# APM4532KC-TRL-VB

**VBsemi Elec** · MOSFETs · SO-8

APM4532KC-TRL-VB from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of the N-channel MOSFET (channel 1, 30 V, 8 A package-limited). |
| 2 | G1 | input | Gate of the N-channel MOSFET (channel 1), VGS maximum ±20 V. |
| 3 | S2 | passive | Source of the P-channel MOSFET (channel 2, -30 V, -8 A package-limited). |
| 4 | G2 | input | Gate of the P-channel MOSFET (channel 2), VGS maximum ±20 V. |
| 5 | D2 | passive | Drain of the P-channel MOSFET (channel 2), VDS rated -30 V; tied with pin 6. |
| 6 | D2 | passive | Drain of the P-channel MOSFET (channel 2), VDS rated -30 V; tied with pin 5. |
| 7 | D1 | passive | Drain of the N-channel MOSFET (channel 1), VDS rated 30 V; tied with pin 8. |
| 8 | D1 | passive | Drain of the N-channel MOSFET (channel 1), VDS rated 30 V; tied with pin 7. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage N-Ch | VDS |  |  | 30 | V | TA = 25 °C | 1 |
| Drain-Source Voltage P-Ch | VDS |  |  | -30 | V | TA = 25 °C | 1 |
| Gate-Source Voltage N-Ch | VGS | -20 |  | 20 | V | TA = 25 °C | 1 |
| Gate-Source Voltage P-Ch | VGS | -20 |  | 20 | V | TA = 25 °C | 1 |
| Continuous Drain Current N-Ch | ID |  |  | 8 | A | TC = 25 °C, TJ = 150 °C, package limited | 1 |
| Continuous Drain Current P-Ch | ID |  |  | -8 | A | TC = 25 °C, TJ = 150 °C, package limited | 1 |
| Pulsed Drain Current N-Ch | IDM |  |  | 40 | A | 10 µs pulse width | 1 |
| Pulsed Drain Current P-Ch | IDM |  |  | -40 | A | 10 µs pulse width | 1 |
| Source-Drain Diode Current N-Ch | IS |  |  | 2.6 | A | TC = 25 °C | 1 |
| Source-Drain Diode Current P-Ch | IS |  |  | -2.6 | A | TC = 25 °C | 1 |
| Single Pulse Avalanche Current N-Ch | IAS |  |  | 10 | A | L = 0.1 mH | 1 |
| Single Pulse Avalanche Current P-Ch | IAS |  |  | 20 | A | L = 0.1 mH | 1 |
| Maximum Power Dissipation N-Ch | PD |  |  | 2 | W | TA = 25 °C, b, c | 1 |
| Maximum Power Dissipation P-Ch | PD |  |  | 2 | W | TA = 25 °C, b, c | 1 |
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 |  | 150 | °C |  | 1 |
| Junction-to-Ambient Thermal Resistance N-Ch | RthJA |  | 50 | 62.5 | °C/W | t ≤ 10 s | 1 |
| Junction-to-Ambient Thermal Resistance P-Ch | RthJA |  | 47 | 62.5 | °C/W | t ≤ 10 s | 1 |
| Junction-to-Foot Thermal Resistance N-Ch | RthJF |  | 30 | 40 | °C/W | Steady State | 1 |
| Junction-to-Foot Thermal Resistance P-Ch | RthJF |  | 29 | 38 | °C/W | Steady State | 1 |
| Drain-Source Breakdown Voltage P-Ch | VDS | -30 |  |  | V | VGS = 0 V, ID = - 250 µA | 2 |
| Gate Threshold Voltage N-Ch | VGS(th) | 1 |  | 2 | V | VDS = VGS, ID = 250 µA | 2 |
| Gate Threshold Voltage P-Ch | VGS(th) | -2 |  | -1 | V | VDS = VGS, ID = - 250 µA | 2 |
| Gate-Body Leakage N-Ch | IGSS | -100 |  | 100 | nA | VDS = 0 V, VGS = ± 12 V | 2 |
| Gate-Body Leakage P-Ch | IGSS | -100 |  | 100 | nA | VDS = 0 V, VGS = ± 12 V | 2 |
| Zero Gate Voltage Drain Current N-Ch | IDSS |  |  | 1 | µA | VDS = 30 V, VGS = 0 V | 2 |
| Zero Gate Voltage Drain Current P-Ch | IDSS | -1 |  |  | µA | VDS = - 30 V, VGS = 0 V | 2 |
| On-State Drain Current N-Ch | ID(on) | 20 |  |  | A | VDS = 5 V, VGS = 10 V | 2 |
| On-State Drain Current P-Ch | ID(on) | -20 |  |  | A | VDS = - 5 V, VGS = - 10 V | 2 |
| Forward Transconductance N-Ch | gfs |  | 27 |  | S | VDS = 15 V, ID = 6.8 A | 2 |
| Forward Transconductance P-Ch | gfs |  | 25 |  | S | VDS = - 15 V, ID = - 6.7 A | 2 |
| Body Diode Voltage N-Ch | VSD |  | 0.81 | 1.2 | V | IS = 5.4 A | 3 |
| Body Diode Voltage P-Ch | VSD |  | -0.77 | -1.2 | V | IS = - 2 A | 3 |
| Rise Time P-Ch | tr |  | 9 | 15 | ns | VDD = - 20 V, RL = 2 Ω, ID ≅ - 10 A, VGEN = - 10 V, Rg = 1 Ω | 3 |
| Fall Time P-Ch | tf |  | 10 | 16 | ns | VDD = - 20 V, RL = 2 Ω, ID ≅ - 10 A, VGEN = - 10 V, Rg = 1 Ω | 3 |
| Fall Time N-Ch | tf |  | 5 | 9 | ns | VDD = 20 V, RL = 3.7 Ω, ID ≅ 5.4 A, VGEN = 10 V, Rg = 1 Ω | 3 |

## CAD (KiCad official)

- Symbol: `APM4532KC-TRL-VB`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `apm4532kc-trl-vb-etched.step` / `apm4532kc-trl-vb-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `apm4532kc-trl-vb.step` / `apm4532kc-trl-vb.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [VBsemi Elec datasheet](docs/apm4532kc-trl-vb-datasheet.pdf) (14 pp, sha256 `abe08676bff4ce60`, retrieved 2026-10-24, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/apm4532kc-trl-vb-datasheet.pdf)