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APM4532KC-JSM

JSMSEMI · MOSFETs · SOP-8

APM4532KC-JSM from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S2 passive Source of the N-channel MOSFET (30 V VDS, 6.9 A ID).
2 G2 input Gate of the N-channel MOSFET, with a VGS maximum of ±20 V.
3 S1 passive Source of the P-channel MOSFET (-30 V VDS, -6.0 A ID).
4 G1 input Gate of the P-channel MOSFET, with a VGS maximum of ±20 V.
5 D1 passive Drain of the P-channel MOSFET (-30 V VDS, -6.0 A ID), shorted to pin 6 externally.
6 D1 passive Drain of the P-channel MOSFET (-30 V VDS, -6.0 A ID), shorted to pin 5 externally.
7 D2 passive Drain of the N-channel MOSFET (30 V VDS, 6.9 A ID), shorted to pin 8 externally.
8 D2 passive Drain of the N-channel MOSFET (30 V VDS, 6.9 A ID), shorted to pin 7 externally.

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOP-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: APM4532KC-JSM
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: apm4532kc-jsm-etched.step / apm4532kc-jsm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); apm4532kc-jsm.step / apm4532kc-jsm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (8 pp, sha256 e900e72f25b36080, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF