# APM32F407VGT6

**Geehy** · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

APM32F407VGT6 from Geehy, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5V-tolerant (5T) I/O port E pin 2 with alternate functions TRACECK, SMC_A23, ETH_MII_TXD3, EVENTOUT. |
| 2 | PE3 | bidirectional | 5V-tolerant (5T) I/O port E pin 3 with alternate functions TRACED0, SMC_A19, EVENTOUT. |
| 3 | PE4 | bidirectional | 5V-tolerant (5T) I/O port E pin 4 with alternate functions TRACED1, SMC_A20, DCI_D4, EVENTOUT. |
| 4 | PE5 | bidirectional | 5V-tolerant (5T) I/O port E pin 5 with alternate functions TRACED2, SMC_A21, TMR9_CH1, DCI_D6, EVENTOUT. |
| 5 | PE6 | bidirectional | 5V-tolerant (5T) I/O port E pin 6 with alternate functions TRACED3, SMC_A22, TMR9_CH2, DCI_D7, EVENTOUT. |
| 6 | VBAT | power_in | Backup domain power supply, specified as 1.65V to 3.6V in the feature list. |
| 7 | PC13 | bidirectional | 5T I/O port C pin 13 with EVENTOUT and additional functions RTC_OUT, RTC_TAMP1, RTC_TS. |
| 8 | PC14 | bidirectional | 5T I/O port C pin 14, also OSC32_IN (32.768kHz LSE oscillator input), alternate EVENTOUT. |
| 9 | PC15 | bidirectional | 5T I/O port C pin 15, also OSC32_OUT (32.768kHz LSE oscillator output), alternate EVENTOUT. |
| 10 | VSS | power_in | Digital ground. |
| 11 | VDD | power_in | Digital supply, 1.8V to 3.6V per the feature list. |
| 12 | PH0 | bidirectional | I/O port H pin 0 (HSE oscillator pin per the 4-26MHz external crystal feature; function table not in the provided pages). |
| 13 | PH1 | bidirectional | I/O port H pin 1 (HSE oscillator pin per the 4-26MHz external crystal feature; function table not in the provided pages). |
| 14 | NRST | bidirectional | Bidirectional reset pin with built-in pull-up resistor (RST structure per the legend). |
| 15 | PC0 | bidirectional | I/O port C pin 0. |
| 16 | PC1 | bidirectional | I/O port C pin 1. |
| 17 | PC2 | bidirectional | I/O port C pin 2. |
| 18 | PC3 | bidirectional | I/O port C pin 3. |
| 19 | VDD | power_in | Digital supply, 1.8V to 3.6V per the feature list. |
| 20 | VSSA | power_in | Analog ground. |
| 21 | VREF+ | power_in | Positive analog reference voltage input for the ADC/DAC. |
| 22 | VDDA | power_in | Analog supply, 1.8V to 3.6V per the feature list. |
| 23 | PA0 | bidirectional | I/O port A pin 0 (labelled PA0-WKUP in the LQFP64 diagram). |
| 24 | PA1 | bidirectional | I/O port A pin 1. |
| 25 | PA2 | bidirectional | I/O port A pin 2. |
| 26 | PA3 | bidirectional | I/O port A pin 3. |
| 27 | VSS | power_in | Digital ground. |
| 28 | VDD | power_in | Digital supply, 1.8V to 3.6V per the feature list. |
| 29 | PA4 | bidirectional | I/O port A pin 4. |
| 30 | PA5 | bidirectional | I/O port A pin 5. |
| 31 | PA6 | bidirectional | I/O port A pin 6. |
| 32 | PA7 | bidirectional | I/O port A pin 7. |
| 33 | PC4 | bidirectional | I/O port C pin 4. |
| 34 | PC5 | bidirectional | I/O port C pin 5. |
| 35 | PB0 | bidirectional | I/O port B pin 0. |
| 36 | PB1 | bidirectional | I/O port B pin 1. |
| 37 | PB2 | bidirectional | I/O port B pin 2. |
| 38 | PE7 | bidirectional | I/O port E pin 7. |
| 39 | PE8 | bidirectional | I/O port E pin 8. |
| 40 | PE9 | bidirectional | I/O port E pin 9. |
| 41 | PE10 | bidirectional | I/O port E pin 10. |
| 42 | PE11 | bidirectional | I/O port E pin 11. |
| 43 | PE12 | bidirectional | I/O port E pin 12. |
| 44 | PE13 | bidirectional | I/O port E pin 13. |
| 45 | PE14 | bidirectional | I/O port E pin 14. |
| 46 | PE15 | bidirectional | I/O port E pin 15. |
| 47 | PB10 | bidirectional | I/O port B pin 10. |
| 48 | PB11 | bidirectional | I/O port B pin 11. |
| 49 | VCAP_1 | passive | Core voltage regulator output capacitor connection (VCAP_1). |
| 50 | VDD | power_in | Digital supply, 1.8V to 3.6V per the feature list. |
| 51 | PB12 | bidirectional | I/O port B pin 12. |
| 52 | PB13 | bidirectional | I/O port B pin 13. |
| 53 | PB14 | bidirectional | I/O port B pin 14. |
| 54 | PB15 | bidirectional | I/O port B pin 15. |
| 55 | PD8 | bidirectional | I/O port D pin 8. |
| 56 | PD9 | bidirectional | I/O port D pin 9. |
| 57 | PD10 | bidirectional | I/O port D pin 10. |
| 58 | PD11 | bidirectional | I/O port D pin 11. |
| 59 | PD12 | bidirectional | I/O port D pin 12. |
| 60 | PD13 | bidirectional | I/O port D pin 13. |
| 61 | PD14 | bidirectional | I/O port D pin 14. |
| 62 | PD15 | bidirectional | I/O port D pin 15. |
| 63 | PC6 | bidirectional | I/O port C pin 6. |
| 64 | PC7 | bidirectional | I/O port C pin 7. |
| 65 | PC8 | bidirectional | I/O port C pin 8. |
| 66 | PC9 | bidirectional | I/O port C pin 9. |
| 67 | PA8 | bidirectional | I/O port A pin 8. |
| 68 | PA9 | bidirectional | I/O port A pin 9. |
| 69 | PA10 | bidirectional | I/O port A pin 10. |
| 70 | PA11 | bidirectional | I/O port A pin 11. |
| 71 | PA12 | bidirectional | I/O port A pin 12. |
| 72 | PA13 | bidirectional | I/O port A pin 13 (JTAG/SWD debug interface supported per the feature list). |
| 73 | VCAP_2 | passive | Core voltage regulator output capacitor connection (VCAP_2). |
| 74 | VSS | power_in | Digital ground. |
| 75 | VDD | power_in | Digital supply, 1.8V to 3.6V per the feature list. |
| 76 | PA14 | bidirectional | I/O port A pin 14 (JTAG/SWD debug interface supported per the feature list). |
| 77 | PA15 | bidirectional | I/O port A pin 15. |
| 78 | PC10 | bidirectional | I/O port C pin 10. |
| 79 | PC11 | bidirectional | I/O port C pin 11. |
| 80 | PC12 | bidirectional | I/O port C pin 12. |
| 81 | PD0 | bidirectional | I/O port D pin 0. |
| 82 | PD1 | bidirectional | I/O port D pin 1. |
| 83 | PD2 | bidirectional | I/O port D pin 2. |
| 84 | PD3 | bidirectional | I/O port D pin 3. |
| 85 | PD4 | bidirectional | I/O port D pin 4. |
| 86 | PD5 | bidirectional | I/O port D pin 5. |
| 87 | PD6 | bidirectional | I/O port D pin 6. |
| 88 | PD7 | bidirectional | I/O port D pin 7. |
| 89 | PB3 | bidirectional | I/O port B pin 3. |
| 90 | PB4 | bidirectional | I/O port B pin 4. |
| 91 | PB5 | bidirectional | I/O port B pin 5. |
| 92 | PB6 | bidirectional | I/O port B pin 6. |
| 93 | PB7 | bidirectional | I/O port B pin 7. |
| 94 | BOOT0 | input | Dedicated Boot0 pin (B structure per the legend). |
| 95 | PB8 | bidirectional | I/O port B pin 8. |
| 96 | PB9 | bidirectional | I/O port B pin 9. |
| 97 | PE0 | bidirectional | I/O port E pin 0. |
| 98 | PE1 | bidirectional | I/O port E pin 1. |
| 99 | VSS | power_in | Digital ground. |
| 100 | VDD | power_in | Digital supply, 1.8V to 3.6V per the feature list. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Geehy |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |

## CAD (KiCad official)

- Symbol: `APM32F407VGT6`
- Footprint: `Package_QFP:LQFP-100_14x14mm_P0.5mm`
- 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files: `apm32f407vgt6-etched.step` / `apm32f407vgt6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `apm32f407vgt6.step` / `apm32f407vgt6.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Geehy datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589040399062585344) (103 pp, sha256 `c54b9022a37c7c02`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/apm32f407vgt6-datasheet.pdf)