APM32F103TBU7

{
  "slug": "apm32f103tbu7",
  "version": "0.1.0",
  "type": "component",
  "description": "Geehy Microcontrollers (MCU/MPU/SOC), QFN-36(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "apm32f103tbu7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "apm32f103tbu7.kicad_sym",
    "apm32f103tbu7.kicad_mod",
    "apm32f103tbu7.glb",
    "apm32f103tbu7.step",
    "apm32f103tbu7.lbr",
    "docs/hero.png",
    "docs/apm32f103tbu7-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "apm32f103tbu7-hero.glb",
    "apm32f103tbu7-hero.overlay.json"
  ],
  "component": {
    "mpn": "APM32F103TBU7",
    "manufacturer": "Geehy",
    "package": "QFN-36(6x6)",
    "pin_count": 37,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918888218169344",
    "parts": {
      "symbol": "apm32f103tbu7.kicad_sym",
      "footprint": "apm32f103tbu7.kicad_mod",
      "model_3d": "apm32f103tbu7-hero.glb",
      "model_3d_plain": "apm32f103tbu7.glb",
      "model_3d_step": "apm32f103tbu7-etched.step",
      "model_3d_step_plain": "apm32f103tbu7.step",
      "lbr": "apm32f103tbu7.lbr"
    },
    "distributor_links": {
      "lcsc": "C2880478"
    },
    "distributor_check": {
      "checked_at": "2026-10-09T19:22:31Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD_3",
        "type": "power_in",
        "description": "Digital supply input for the I/O ports and the internal core regulator, specified at 2.0 V to 3.6 V."
      },
      {
        "number": "2",
        "name": "OSC_IN",
        "type": "input",
        "description": "HXT crystal oscillator input (4-16 MHz); after reset this pin defaults to OSC_IN and can be switched in software to PD0."
      },
      {
        "number": "3",
        "name": "OSC_OUT",
        "type": "output",
        "description": "HXT crystal oscillator output; after reset this pin defaults to OSC_OUT and can be switched in software to PD1."
      },
      {
        "number": "4",
        "name": "NRST",
        "type": "bidirectional",
        "description": "Reset pin with a permanent internal pull-up of 32-49 kΩ; input low level max 0.8 V and input high level min 2 V."
      },
      {
        "number": "5",
        "name": "VSSA",
        "type": "power_in",
        "description": "Analog ground for the ADC, reset block, RC oscillators and PLL; must be connected to VSS."
      },
      {
        "number": "6",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog supply for the ADC, reset block, RC oscillators and PLL; must be connected to VDD, and must be 2.4 V to 3.6 V when the ADC is used."
      },
      {
        "number": "7",
        "name": "PA0-WKUP",
        "type": "bidirectional",
        "description": "GPIO PA0 with WKUP wake-up input (rising edge exits standby), ADC12_IN0, USART2_CTS and TMR2_CH1_ETR alternates; not marked 5 V tolerant in the table."
      },
      {
        "number": "8",
        "name": "PA1",
        "type": "bidirectional",
        "description": "GPIO PA1 with ADC12_IN1, USART2_RTS and TMR2_CH2 alternates; not marked 5 V tolerant in the table."
      },
      {
        "number": "9",
        "name": "PA2",
        "type": "bidirectional",
        "description": "GPIO PA2 with ADC12_IN2, USART2_TX and TMR2_CH3 alternates; not marked 5 V tolerant in the table."
      },
      {
        "number": "10",
        "name": "PA3",
        "type": "bidirectional",
        "description": "GPIO PA3 with ADC12_IN3, USART2_RX and TMR2_CH4 alternates; not marked 5 V tolerant in the table."
      },
      {
        "number": "11",
        "name": "PA4",
        "type": "bidirectional",
        "description": "GPIO PA4 with ADC12_IN4, SPI1_NSS and USART2_CK alternates; not marked 5 V tolerant in the table."
      },
      {
        "number": "12",
        "name": "PA5",
        "type": "bidirectional",
        "description": "GPIO PA5 with ADC12_IN5 and SPI1_SCK alternates; not marked 5 V tolerant in the table."
      },
      {
        "number": "13",
        "name": "PA6",
        "type": "bidirectional",
        "description": "GPIO PA6 with ADC12_IN6, SPI1_MISO, TMR3_CH1 and TMR1_BKIN alternates; not marked 5 V tolerant in the table."
      },
      {
        "number": "14",
        "name": "PA7",
        "type": "bidirectional",
        "description": "GPIO PA7 with ADC12_IN7, SPI1_MOSI, TMR3_CH2 and TMR1_CH1N alternates; not marked 5 V tolerant in the table."
      },
      {
        "number": "15",
        "name": "PB0",
        "type": "bidirectional",
        "description": "GPIO PB0 with ADC12_IN8, TMR3_CH3 and TMR1_CH2N alternates; not marked 5 V tolerant in the table."
      },
      {
        "number": "16",
        "name": "PB1",
        "type": "bidirectional",
        "description": "GPIO PB1 with ADC12_IN9, TMR3_CH4 and TMR1_CH3N alternates; not marked 5 V tolerant in the table."
      },
      {
        "number": "17",
        "name": "PB2",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PB2, also used as BOOT1 for boot mode selection."
      },
      {
        "number": "18",
        "name": "VSS_1",
        "type": "power_in",
        "description": "Ground pin for the I/O ring and digital logic; connect to board ground."
      },
      {
        "number": "19",
        "name": "VDD_1",
        "type": "power_in",
        "description": "Digital supply input for the I/O ring and digital logic, specified at 2.0 V to 3.6 V."
      },
      {
        "number": "20",
        "name": "PA8",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PA8 with USART1_CK, TMR1_CH1 and MCO alternates."
      },
      {
        "number": "21",
        "name": "PA9",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PA9 with USART1_TX and TMR1_CH2 alternates."
      },
      {
        "number": "22",
        "name": "PA10",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PA10 with USART1_RX and TMR1_CH3 alternates."
      },
      {
        "number": "23",
        "name": "PA11",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PA11 with USART1_CTS, USBDM, CAN_RX and TMR1_CH4 alternates; the datasheet reserves PA11/PA12 for USB when USB and CAN are used together."
      },
      {
        "number": "24",
        "name": "PA12",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PA12 with USART1_RTS, USBDP, CAN_TX and TMR1_ETR alternates; the datasheet reserves PA11/PA12 for USB when USB and CAN are used together."
      },
      {
        "number": "25",
        "name": "PA13",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PA13 whose default function after reset is the JTMS/SWDIO debug pin."
      },
      {
        "number": "26",
        "name": "VSS_2",
        "type": "power_in",
        "description": "Ground pin for the digital logic and I/O; connect to board ground."
      },
      {
        "number": "27",
        "name": "VDD_2",
        "type": "power_in",
        "description": "Digital supply input for the digital logic and I/O, specified at 2.0 V to 3.6 V."
      },
      {
        "number": "28",
        "name": "PA14",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PA14 whose default function after reset is the JTCK debug clock (printed as SWCMU in the table)."
      },
      {
        "number": "29",
        "name": "PA15",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PA15 whose default function after reset is JTDI, with TMR2_CH1_ETR and SPI1_NSS alternates."
      },
      {
        "number": "30",
        "name": "PB3",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PB3 whose default function after reset is JTDO, with TRACESWO, TMR2_CH2 and SPI1_SCK alternates."
      },
      {
        "number": "31",
        "name": "PB4",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PB4 whose default function after reset is NJTRST, with TMR3_CH1 and SPI1_MISO alternates."
      },
      {
        "number": "32",
        "name": "PB5",
        "type": "bidirectional",
        "description": "GPIO PB5 with I2C1_SMBAI, TMR3_CH2 and SPI1_MOSI alternates; not marked 5 V tolerant in the table."
      },
      {
        "number": "33",
        "name": "PB6",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PB6 with I2C1_SCL, I2C3_SCL, TMR4_CH1 and USART1_TX alternates."
      },
      {
        "number": "34",
        "name": "PB7",
        "type": "bidirectional",
        "description": "5 V tolerant GPIO PB7 with I2C1_SDA, I2C3_SDA, TMR4_CH2 and USART1_RX alternates."
      },
      {
        "number": "35",
        "name": "BOOT0",
        "type": "input",
        "description": "Boot mode select input that, together with BOOT1 (PB2), selects boot from user flash, system memory or internal SRAM."
      },
      {
        "number": "36",
        "name": "VSS_3",
        "type": "power_in",
        "description": "Ground pin for the digital logic and I/O; connect to board ground."
      },
      {
        "number": "37",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The MPN suffix U7 is not in the ordering list (table 51 lists only U6 QFN36 parts). The ordering-cod; Pin numbers come from the QFN36 column of table 8, because the QFN36 pin-configuration figure text i; NRST is printed as type I/O in table 8 and mapped to bidirectional here. The datasheet describes it ",
          "exposed pad 37 added from the footprint"
        ],
        "pages_sent": 67,
        "cost_usd": 0.2103,
        "at": "2026-10-09T19:20:17"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918888218169344",
        "pages": 84,
        "sha256": "1fb9f43ef8119b4c",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 37,
        "described": 37,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "apm32f103tbu7.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          6.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6212c4fd2463ccb7c6ae2c35f5e24c80884153fcaeaf8e86549c0e49087bc8bb",
        "checked": "2026-10-09",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "apm32f103tbu7-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          6.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f954ef80c66695d715b56a7bf76eb8b53d6230543850b57e6262342d9440f980",
        "checked": "2026-10-09",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}