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APM32F072RBT7

Geehy · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

APM32F072RBT7 from Geehy, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup battery supply for the RTC, VBAT=1.65~3.6V.
2 PC13 bidirectional STD I/O; additional functions WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT.
3 PC14-OSC32_IN bidirectional STD I/O (PC14 after reset); additional function OSC32_IN.
4 PC15-OSC32_OUT bidirectional STD I/O (PC15 after reset); additional function OSC32_OUT.
5 PF0-OSC_IN bidirectional 5V-tolerant I/O (PF0 after reset); alternate function CRS_SYNC, additional function OSC_IN.
6 PF1-OSC_OUT bidirectional 5V-tolerant I/O (PF1 after reset); additional function OSC_OUT.
7 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
8 PC0 bidirectional STDA I/O; alternate function EVENTOUT, additional function ADC_IN10.
9 PC1 bidirectional STDA I/O; alternate function EVENTOUT, additional function ADC_IN11.
10 PC2 bidirectional STDA I/O; alternate functions SPI2_MISO, I2S2_MCK, EVENTOUT; additional function ADC_IN12.
11 PC3 bidirectional STDA I/O; alternate functions SPI2_MOSI, I2S2_SD, EVENTOUT; additional function ADC_IN13.
12 VSSA power_in Analog ground.
13 VDDA power_in Analog supply, VDDA=VDD3.6V (ADC analog supply 2.43.6V).
14 PA0 bidirectional STDA I/O; alternate functions USART2_CTS, TMR2_CH1_ETR, COMP1_OUT, TSC_G1_IO1, USART4_TX; additional functions RTC_TAMP2, WKUP1, ADC_IN0, COMP1_INM6.
15 PA1 bidirectional STDA I/O; alternate functions USART2_RTS, TMR2_CH2, TMR15_CH1N, TSC_G1_IO2, USART4_RX, EVENTOUT; additional functions ADC_IN1, COMP1_INP.
16 PA2 bidirectional STDA I/O; alternate functions USART2_TX, COMP2_OUT, TMR2_CH3, TMR15_CH1, TSC_G1_IO3; additional functions ADC_IN2, COMP2_INM6, WKUP4.
17 PA3 bidirectional STDA I/O; alternate functions USART2_RX, TMR2_CH4, TMR15_CH2, TSC_G1_IO4; additional functions ADC_IN3, COMP2_INP.
18 VSS power_in Digital ground.
19 VDD power_in Digital supply, VDD=2.0~3.6V.
20 PA4 bidirectional STDA I/O; alternate functions SPI1_NSS, I2S1_WS, TMR14_CH1, TSC_G2_IO1, USART2_CK; additional functions COMP1_INM4, COMP2_INM4, ADC_IN4, DAC_OUT1.
21 PA5 bidirectional STDA I/O; alternate functions SPI1_SCK, I2S1_CK, CEC, TMR2_CH1_ETR, TSC_G2_IO2; additional functions COMP1_INM5, COMP2_INM5, ADC_IN5, DAC_OUT2.
22 PA6 bidirectional STDA I/O; alternate functions SPI1_MISO, I2S1_MCK, TMR3_CH1, TMR1_BKIN, TMR16_CH1, COMP1_OUT, TSC_G2_IO3, EVENTOUT, USART3_CTS; additional function ADC_IN6.
23 PA7 bidirectional STDA I/O; alternate functions SPI1_MOSI, I2S1_SD, TMR3_CH2, TMR14_CH1, TMR1_CH1N, TMR17_CH1, COMP2_OUT, TSC_G2_IO4, EVENTOUT; additional function ADC_IN7.
24 PC4 bidirectional STDA I/O; alternate functions EVENTOUT, USART3_TX; additional function ADC_IN14.
25 PC5 bidirectional STDA I/O; alternate functions TSC_G3_IO1, USART3_RX; additional functions ADC_IN15, WKUP5.
26 PB0 bidirectional STDA I/O; alternate functions TMR3_CH3, TMR1_CH2N, TSC_G3_IO2, EVENTOUT, USART3_CK; additional function ADC_IN8.
27 PB1 bidirectional STDA I/O; alternate functions TMR3_CH4, USART3_RTS, TMR14_CH1, TMR1_CH3N, TSC_G3_IO3; additional function ADC_IN9.
28 PB2 bidirectional 5V-tolerant I/O; alternate function TSC_G3_IO4.
29 PB10 bidirectional 5V-tolerant I/O; alternate functions SPI2_SCK, I2C2_SCL, USART3_TX, CEC, TSC_SYNC, TMR2_CH3.
30 PB11 bidirectional 5V-tolerant I/O; alternate functions USART3_RX, TMR2_CH4, EVENTOUT, TSC_G6_IO1, I2C2_SDA.
31 VSS power_in Digital ground.
32 VDD power_in Digital supply, VDD=2.0~3.6V.
33 PB12 bidirectional 5V-tolerant I/O; alternate functions TMR1_BKIN, TMR15_BKIN, SPI2_NSS, I2S2_WS, USART3_CK, TSC_G6_IO2, EVENTOUT.
34 PB13 bidirectional 5V-tolerant I/O with FM+ capability (5Tf); alternate functions SPI2_SCK, I2S2_CK, I2C2_SCL, USART3_CTS, TMR1_CH1N, TSC_G6_IO3.
35 PB14 bidirectional 5V-tolerant I/O with FM+ capability (5Tf); alternate functions SPI2_MISO, I2S2_MCK, I2C2_SDA, USART3_RTS, TMR1_CH2N, TMR15_CH1, TSC_G6_IO4.
36 PB15 bidirectional 5V-tolerant I/O; alternate functions SPI2_MOSI, I2S2_SD, TMR1_CH3N, TMR15_CH1N, TMR15_CH2; additional functions WKUP7, RTC_REFIN.
37 PC6 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate function TMR3_CH1.
38 PC7 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate function TMR3_CH2.
39 PC8 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate function TMR3_CH3.
40 PC9 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate function TMR3_CH4.
41 PA8 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate functions USART1_CK, TMR1_CH1, EVENTOUT, MCO, CRS_SYNC.
42 PA9 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate functions USART1_TX, TMR1_CH2, TMR15_BKIN, TSC_G4_IO1.
43 PA10 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate functions USART1_RX, TMR1_CH3, TMR17_BKIN, TSC_G4_IO2.
44 PA11 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate functions CAN_RX, USART1_CTS, TMR1_CH4, COMP1_OUT, TSC_G4_IO3, EVENTOUT; additional function USBD_DM.
45 PA12 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate functions CAN_TX, USART1_RTS, TMR1_ETR, COMP2_OUT, TSC_G4_IO4, EVENTOUT; additional function USBD_DP.
46 PA13 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate functions IR_OUT, SWDIO, USBD_NOE.
47 VSS power_in Digital ground.
48 VDDIO2 power_in Supply for the VDDIO2-powered I/Os, VDDIO2=1.65~3.6V.
49 PA14 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate functions USART2_TX, SWCLK.
50 PA15 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate functions SPI1_NSS, I2S1_WS, USART2_RX, USART4_RTS, TMR2_CH1_ETR, EVENTOUT.
51 PC10 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate functions USART3_TX, USART4_TX.
52 PC11 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate functions USART3_RX, USART4_RX.
53 PC12 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate functions USART3_CK, USART4_CK.
54 PD2 bidirectional 5V-tolerant I/O powered by VDDIO2; alternate functions USART3_RTS, TMR3_ETR.
55 PB3 bidirectional I/O pin shown in the LQFP64 pinout diagram; its function table is not in the provided pages.
56 PB4 bidirectional I/O pin shown in the LQFP64 pinout diagram; its function table is not in the provided pages.
57 PB5 bidirectional I/O pin shown in the LQFP64 pinout diagram; its function table is not in the provided pages.
58 PB6 bidirectional I/O pin shown in the LQFP64 pinout diagram; its function table is not in the provided pages.
59 PB7 bidirectional I/O pin shown in the LQFP64 pinout diagram; its function table is not in the provided pages.
60 BOOT0 input Dedicated Boot0 pin (type B per the legend); its function table is not in the provided pages.
61 PB8 bidirectional I/O pin shown in the LQFP64 pinout diagram; its function table is not in the provided pages.
62 PB9 bidirectional I/O pin shown in the LQFP64 pinout diagram; its function table is not in the provided pages.
63 VSS power_in Digital ground, shown in the LQFP64 pinout diagram.
64 VDD power_in Digital supply (VDD=2.0~3.6V), shown in the LQFP64 pinout diagram.

Key specifications

Parameter Value
Manufacturer Geehy
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: APM32F072RBT7
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: apm32f072rbt7-etched.step / apm32f072rbt7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); apm32f072rbt7.step / apm32f072rbt7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Geehy datasheet (65 pp, sha256 6309310bb67a750a, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF