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Contents

README

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APM32F051C8T6

Geehy · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

APM32F051C8T6 from Geehy, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup domain supply (1.65-3.6 V). Powers the RTC and backup registers when VDD is absent.
2 PC13 bidirectional General-purpose 3.3 V I/O (TC). Additional functions: RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2. Powered from the VBAT switch, so drive strength is limited (≤2 MHz at 30 pF).
3 PC14/OSC32_IN bidirectional Low-speed 32.768 kHz oscillator input, or standard 3.3 V I/O (TC). Limited drive strength when used as GPIO.
4 PC15/OSC32_OUT bidirectional Low-speed 32.768 kHz oscillator output, or standard 3.3 V I/O (TC). Limited drive strength when used as GPIO.
5 PF0/OSC_IN bidirectional High-speed 4-32 MHz oscillator input, or 5 V-tolerant GPIO.
6 PF1/OSC_OUT bidirectional High-speed oscillator output, or 5 V-tolerant GPIO.
7 NRST bidirectional Bidirectional device reset (active low) with internal weak pull-up. Drives low during internal reset; may be pulled low externally to reset the device.
8 VSSA power_in Analog ground reference for the ADC, DAC, comparators and internal reference.
9 VDDA power_in Analog supply (2.4-3.6 V), independent of VDD, feeding the ADC, DAC, comparators and voltage reference.
10 PA0 bidirectional 3.3 V I/O directly connected to ADC (TTa). Alt: USART2_CTS, TMR2_CH1_ETR, COMP1_OUT, TSC_G1_IO1. Additional: ADC_IN0, COMP1_INM6, RTC_TAMP2, WKUP1.
11 PA1 bidirectional 3.3 V I/O directly connected to ADC (TTa). Alt: USART2_RTS, TMR2_CH2, TSC_G1_IO2, EVENTOUT. Additional: ADC_IN1, COMP1_INP.
12 PA2 bidirectional 3.3 V I/O directly connected to ADC (TTa). Alt: USART2_TX, TMR2_CH3, TMR15_CH1, COMP2_OUT, TSC_G1_IO3. Additional: ADC_IN2, COMP2_INM6.
13 PA3 bidirectional 3.3 V I/O directly connected to ADC (TTa). Alt: USART2_RX, TMR2_CH4, TMR15_CH2, TSC_G1_IO4. Additional: ADC_IN3, COMP2_INP.
14 PA4 bidirectional 3.3 V I/O directly connected to ADC (TTa). Alt: SPI1_NSS, I2S1_WS, USART2_CK, TMR14_CH1, TSC_G2_IO1. Additional: ADC_IN4, COMP1/2_INM4, DAC_OUT1.
15 PA5 bidirectional 3.3 V I/O directly connected to ADC (TTa). Alt: SPI1_SCK, I2S1_CK, CEC, TMR2_CH1_ETR, TSC_G2_IO2. Additional: ADC_IN5, COMP1/2_INM5.
16 PA6 bidirectional 3.3 V I/O directly connected to ADC (TTa). Alt: SPI1_MISO, I2S1_MCK, TMR3_CH1, TMR1_BKIN, TMR16_CH1, COMP1_OUT, TSC_G2_IO3, EVENTOUT. Additional: ADC_IN6.
17 PA7 bidirectional 3.3 V I/O directly connected to ADC (TTa). Alt: SPI1_MOSI, I2S1_SD, TMR3_CH2, TMR14_CH1, TMR1_CH1N, TMR17_CH1, COMP2_OUT, TSC_G2_IO4, EVENTOUT. Additional: ADC_IN7.
18 PB0 bidirectional 3.3 V I/O directly connected to ADC (TTa). Alt: TMR3_CH3, TMR1_CH2N, TSC_G3_IO2, EVENTOUT. Additional: ADC_IN8.
19 PB1 bidirectional 3.3 V I/O directly connected to ADC (TTa). Alt: TMR3_CH4, TMR14_CH1, TMR1_CH3N, TSC_G3_IO3. Additional: ADC_IN9.
20 PB2 bidirectional 5 V-tolerant I/O (FT). Alt: TSC_G3_IO4.
21 PB10 bidirectional 5 V-tolerant I/O (FT). Alt: I2C2_SCL, CEC, TMR2_CH3, TSC_SYNC.
22 PB11 bidirectional 5 V-tolerant I/O (FT). Alt: I2C2_SDA, TMR2_CH4, TSC_G6_IO1, EVENTOUT.
23 VSS power_in Digital ground.
24 VDD power_in Digital supply (2.0-3.6 V).
25 PB12 bidirectional 5 V-tolerant I/O (FT). Alt: SPI2_NSS, TMR1_BKIN, TSC_G6_IO2, EVENTOUT.
26 PB13 bidirectional 5 V-tolerant I/O (FT). Alt: SPI2_SCK, TMR1_CH1N, TSC_G6_IO3.
27 PB14 bidirectional 5 V-tolerant I/O (FT). Alt: SPI2_MISO, TMR1_CH2N, TMR15_CH1, TSC_G6_IO4.
28 PB15 bidirectional 5 V-tolerant I/O (FT). Alt: SPI2_MOSI, TMR1_CH3N, TMR15_CH1N, TMR15_CH2. Additional: RTC_REFIN.
29 PA8 bidirectional 5 V-tolerant I/O (FT). Alt: USART1_CK, TMR1_CH1, EVENTOUT, MCO.
30 PA9 bidirectional 5 V-tolerant I/O (FT). Alt: USART1_TX, TMR1_CH2, TMR15_BKIN, TSC_G4_IO1.
31 PA10 bidirectional 5 V-tolerant I/O (FT). Alt: USART1_RX, TMR1_CH3, TMR17_BKIN, TSC_G4_IO2.
32 PA11 bidirectional 5 V-tolerant I/O (FT). Alt: USART1_CTS, TMR1_CH4, COMP1_OUT, TSC_G4_IO3, EVENTOUT.
33 PA12 bidirectional 5 V-tolerant I/O (FT). Alt: USART1_RTS, TMR1_ETR, COMP2_OUT, TSC_G4_IO4, EVENTOUT.
34 PA13/SWDIO bidirectional 5 V-tolerant I/O (FT). Default after reset: SWDIO with internal pull-up. Alt: IR_OUT, SWDIO.
35 PF6 bidirectional 5 V-tolerant I/O (FT). Alt: I2C2_SCL.
36 PF7 bidirectional 5 V-tolerant I/O (FT). Alt: I2C2_SDA.
37 PA14/SWCLK bidirectional 5 V-tolerant I/O (FT). Default after reset: SWCLK with internal pull-down. Alt: USART2_TX, SWCLK.
38 PA15 bidirectional 5 V-tolerant I/O (FT). Alt: SPI1_NSS, I2S1_WS, USART2_RX, TMR2_CH1_ETR, EVENTOUT.
39 PB3 bidirectional 5 V-tolerant I/O (FT). Alt: SPI1_SCK, I2S1_CK, TMR2_CH2, TSC_G5_IO1, EVENTOUT.
40 PB4 bidirectional 5 V-tolerant I/O (FT). Alt: SPI1_MISO, I2S1_MCK, TMR3_CH1, TSC_G5_IO2, EVENTOUT.
41 PB5 bidirectional 5 V-tolerant I/O (FT). Alt: SPI1_MOSI, I2S1_SD, I2C1_SMBA, TMR16_BKIN, TMR3_CH2.
42 PB6 bidirectional 5 V-tolerant Fast-Mode+ I/O (FTf). Alt: I2C1_SCL, USART1_TX, TMR16_CH1N, TSC_G5_IO3. Supports FM+ 1 Mbit/s I2C.
43 PB7 bidirectional 5 V-tolerant Fast-Mode+ I/O (FTf). Alt: I2C1_SDA, USART1_RX, TMR17_CH1N, TSC_G5_IO4. Supports FM+ 1 Mbit/s I2C.
44 BOOT0 input Boot mode selection input. Sampled at reset to choose boot-from-flash, system memory (bootloader) or SRAM.
45 PB8 bidirectional 5 V-tolerant Fast-Mode+ I/O (FTf). Alt: I2C1_SCL, CEC, TMR16_CH1, TSC_SYNC.
46 PB9 bidirectional 5 V-tolerant Fast-Mode+ I/O (FTf). Alt: I2C1_SDA, IR_OUT, TMR17_CH1, EVENTOUT.
47 VSS power_in Digital ground.
48 VDD power_in Digital supply (2.0-3.6 V).

Key specifications

Parameter Value
Manufacturer Geehy
Package LQFP-48(7x7)
Category MCU
Pins 48

Ordering variants

Same part, different packaging or reel option.

  • APM32F051C8T6C6T6
  • APM32F051C8T6
  • APM32F051C8T6C6U6
  • APM32F051C8T6C8U6
  • APM32F051C8T6R6T6
  • APM32F051C8T6R8T6
  • APM32F051C8T6K6T6
  • APM32F051C8T6K8T6
  • APM32F051C8T6K6U6
  • APM32F051C8T6K8U6

CAD (KiCad official)

  • Symbol: APM32F051C8T6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: apm32f051c8t6-etched.step / apm32f051c8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); apm32f051c8t6.step / apm32f051c8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Geehy datasheet (72 pp, sha256 4c3e595c7482399e, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF