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APM32F030K6T6

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Geehy Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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APM32F030K6T6

Geehy · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

APM32F030K6T6 from Geehy, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Digital power supply for the I/O pins and the internal voltage regulator, rated 2.0-3.6 V, and VDD may exceed VDDA by no more than 0.4 V.
2 PF0-OSC_IN bidirectional 5 V-tolerant FT I/O that serves as the OSC_IN input of the 4-32 MHz external high-speed crystal oscillator.
3 PF1-OSC_OUT bidirectional 5 V-tolerant FT I/O that serves as the OSC_OUT output of the 4-32 MHz external high-speed crystal oscillator.
4 NRST bidirectional Active-low chip reset input and internal reset output, with a permanent internal pull-up of 30-50 kΩ and 300 mV Schmitt hysteresis.
5 VDDA power_in Analog supply for the ADC, reset block, RC oscillators and PLL, rated 2.4-3.6 V, which must never be lower than VDD.
6 PA0 bidirectional 3.3 V-tolerant TTa I/O connected directly to the ADC; alternate function USART2_CTS, additional functions ADC_IN0, RTC_TAMP2 and WKUP1.
7 PA1 bidirectional 3.3 V-tolerant TTa I/O connected directly to the ADC; alternate functions USART2_RTS and EVENTOUT, additional function ADC_IN1.
8 PA2 bidirectional 3.3 V-tolerant TTa I/O connected directly to the ADC; alternate functions USART2_TX and TMR15_CH1, additional function ADC_IN2.
9 PA3 bidirectional 3.3 V-tolerant TTa I/O connected directly to the ADC; alternate functions USART2_RX and TMR15_CH2, additional function ADC_IN3.
10 PA4 bidirectional 3.3 V-tolerant TTa I/O connected directly to the ADC; alternate functions SPI1_NSS, USART2_CK and TMR14_CH1, additional function ADC_IN4.
11 PA5 bidirectional 3.3 V-tolerant TTa I/O connected directly to the ADC; alternate function SPI1_SCK, additional function ADC_IN5.
12 PA6 bidirectional 3.3 V-tolerant TTa I/O connected directly to the ADC; alternate functions SPI1_MISO, TMR3_CH1, TMR1_BKIN, TMR16_CH1 and EVENTOUT, additional function ADC_IN6.
13 PA7 bidirectional 3.3 V-tolerant TTa I/O connected directly to the ADC; alternate functions SPI1_MOSI, TMR3_CH2, TMR14_CH1, TMR1_CH1N, TMR17_CH1 and EVENTOUT, additional function ADC_IN7.
14 PB0 bidirectional 3.3 V-tolerant TTa I/O connected directly to the ADC; alternate functions TMR3_CH3, TMR1_CH2N and EVENTOUT, additional function ADC_IN8.
15 PB1 bidirectional 3.3 V-tolerant TTa I/O connected directly to the ADC; alternate functions TMR3_CH4, TMR14_CH1 and TMR1_CH3N, additional function ADC_IN9.
16 VSS power_in Ground reference for the digital circuitry and I/O pins; all VSS pins must be connected to the same supply ground.
17 VDD power_in Digital power supply, rated 2.0-3.6 V for the standard operating voltage.
18 PA8 bidirectional 5 V-tolerant FT I/O; alternate functions USART1_CK, TMR1_CH1, EVENTOUT and MCO.
19 PA9 bidirectional 5 V-tolerant FT I/O; alternate functions USART1_TX, TMR1_CH2 and TMR15_BKIN.
20 PA10 bidirectional 5 V-tolerant FT I/O; alternate functions USART1_RX, TMR1_CH3 and TMR17_BKIN.
21 PA11 bidirectional 5 V-tolerant FT I/O; alternate functions USART1_CTS, TMR1_CH4 and EVENTOUT.
22 PA12 bidirectional 5 V-tolerant FT I/O; alternate functions USART1_RTS, TMR1_ETR and EVENTOUT.
23 PA13 bidirectional 5 V-tolerant FT I/O that is SWDIO after reset with its internal pull-up active; alternate function IR_OUT.
24 PA14 bidirectional 5 V-tolerant FT I/O that is SWCLK after reset with its internal pull-down active; alternate function USART2_TX.
25 PA15 bidirectional 5 V-tolerant FT I/O; alternate functions SPI1_NSS, USART2_RX and EVENTOUT.
26 PB3 bidirectional 5 V-tolerant FT I/O; alternate functions SPI1_SCK and EVENTOUT.
27 PB4 bidirectional 5 V-tolerant FT I/O; alternate functions SPI1_MISO, TMR3_CH1 and EVENTOUT.
28 PB5 bidirectional 5 V-tolerant FT I/O; alternate functions SPI1_MOSI, I2C1_SMBA, TMR16_BKIN and TMR3_CH2.
29 PB6 bidirectional 5 V-tolerant FT I/O; alternate functions I2C1_SCL, USART1_TX and TMR16_CH1N.
30 PB7 bidirectional 5 V-tolerant FT I/O; alternate functions I2C1_SDA, USART1_RX and TMR17_CH1N.
31 BOOT0 input Boot mode selection pin sampled at startup to choose user Flash, system memory or embedded SRAM boot; allowed input range 0 to 5.5 V.
32 VSS power_in Ground reference for the digital circuitry and I/O pins.

Key specifications

Parameter Value
Manufacturer Geehy
Package LQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

CAD (KiCad official)

  • Symbol: APM32F030K6T6
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: apm32f030k6t6-etched.step / apm32f030k6t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); apm32f030k6t6.step / apm32f030k6t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Geehy datasheet (62 pp, sha256 56d7e9a9c46e0295, retrieved 2026-10-09, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF