# APM32E103VET6

**Geehy** · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-100(14x14)

APM32E103VET6 from Geehy, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5V-tolerant I/O (5T); default function TRACECK, also SMC_A23. |
| 2 | PE3 | bidirectional | 5V-tolerant I/O (5T); default function TRACED0, also SMC_A19 and DMC_DQ4. |
| 3 | PE4 | bidirectional | 5V-tolerant I/O (5T); default function TRACED1, also SMC_A20. |
| 4 | PE5 | bidirectional | 5V-tolerant I/O (5T); default function TRACED2, also SMC_A21 and DMC_DQ5. |
| 5 | PE6 | bidirectional | 5V-tolerant I/O (5T); default function TRACED3, also SMC_A22 and DMC_DQ6. |
| 6 | VBAT | power_in | Backup domain supply 1.8~3.6V; powers the RTC, LSECLK oscillator and backup registers when VDD is off. |
| 7 | PC13-TAMPER-RTC | bidirectional | Standard I/O (STD); default TAMPER_RTC. Powered via a switch limited to 3mA, so as an output only 2MHz mode and 30pF load are allowed. |
| 8 | PC14-OSC32_IN | bidirectional | Standard I/O (STD); default OSC32_IN. Same 3mA power-switch limit as PC13. |
| 9 | PC15-OSC32_OUT | bidirectional | Standard I/O (STD); default OSC32_OUT. Same 3mA power-switch limit as PC13. |
| 10 | VSS_5 | power_in | Digital ground pin. |
| 11 | VDD_5 | power_in | Digital supply pin, 2.0~3.6V. |
| 12 | OSC_IN | input | External 4~16MHz HSE oscillator input (STD); the same pin is PD0 and the datasheet notes it is inherent on LQFP100. |
| 13 | OSC_OUT | output | External HSE oscillator output (STD); the same pin is PD1, output limited to 50MHz mode. |
| 14 | NRST | bidirectional | Reset pin with a built-in weak pull-up, CMOS input. |
| 15 | PC0 | bidirectional | Standard analog I/O (STDA); default ADC123_IN10. |
| 16 | PC1 | bidirectional | Standard analog I/O (STDA); default ADC123_IN11. |
| 17 | PC2 | bidirectional | Standard analog I/O (STDA); default ADC123_IN12. |
| 18 | PC3 | bidirectional | Standard analog I/O (STDA); default ADC123_IN13. |
| 19 | VSSA | power_in | Analog ground; must be connected to VSS. |
| 20 | VREF- | power_in | ADC/DAC reference voltage negative pin. |
| 21 | VREF+ | power_in | ADC/DAC reference voltage positive pin. |
| 22 | VDDA | power_in | Analog supply 2.0~3.6V; must be at least 2.4V when ADC or DAC is used. |
| 23 | PA0-WKUP | bidirectional | Standard analog I/O (STDA); default WKUP, also USART2_CTS, ADC123_IN0, TMR2_CH1_ETR, TMR5_CH1, TMR8_ETR. |
| 24 | PA1 | bidirectional | Standard analog I/O (STDA); default USART2_RTS, also ADC123_IN1, TMR5_CH2, TMR2_CH2. |
| 25 | PA2 | bidirectional | Standard analog I/O (STDA); default USART2_TX, also TMR5_CH3, ADC123_IN2, TMR2_CH3. |
| 26 | PA3 | bidirectional | Standard analog I/O (STDA); default USART2_RX, also TMR5_CH4, ADC123_IN3. |
| 27 | VSS_4 | power_in | Digital ground pin. |
| 28 | VDD_4 | power_in | Digital supply pin, 2.0~3.6V. |
| 29 | PA4 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 30 | PA5 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 31 | PA6 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 32 | PA7 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 33 | PC4 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 34 | PC5 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 35 | PB0 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 36 | PB1 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 37 | PB2 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 38 | PE7 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 39 | PE8 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 40 | PE9 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 41 | PE10 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 42 | PE11 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 43 | PE12 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 44 | PE13 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 45 | PE14 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 46 | PE15 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 47 | PB10 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 48 | PB11 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 49 | VSS_1 | power_in | Digital ground pin. |
| 50 | VDD_1 | power_in | Digital supply pin, 2.0~3.6V. |
| 51 | PB12 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 52 | PB13 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 53 | PB14 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 54 | PB15 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 55 | PD8 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 56 | PD9 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 57 | PD10 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 58 | PD11 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 59 | PD12 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 60 | PD13 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 61 | PD14 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 62 | PD15 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 63 | PC6 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 64 | PC7 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 65 | PC8 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 66 | PC9 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 67 | PA8 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 68 | PA9 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 69 | PA10 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 70 | PA11 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 71 | PA12 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 72 | PA13 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 73 | NC | unconnected | Not connected pin on the LQFP100 package. |
| 74 | VSS_2 | power_in | Digital ground pin. |
| 75 | VDD_2 | power_in | Digital supply pin, 2.0~3.6V. |
| 76 | PA14 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 77 | PA15 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 78 | PC10 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 79 | PC11 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 80 | PC12 | bidirectional | Name from LQFP100 diagram only; its function row is on a table page not included in the provided text. |
| 81 | PD0 | bidirectional | 5V-tolerant I/O (5T); default SMC_D2, also CAN_RX. Output mode limited to 50MHz. |
| 82 | PD1 | bidirectional | 5V-tolerant I/O (5T); default SMC_D3, also CAN_TX. Output mode limited to 50MHz. |
| 83 | PD2 | bidirectional | 5V-tolerant I/O (5T); default TMR3_ETR, UART5_RX, SDIO_CMD, DMC_DQ10. |
| 84 | PD3 | bidirectional | 5V-tolerant I/O (5T); default SMC_CLK and DMC_DQ11, remap USART2_CTS. |
| 85 | PD4 | bidirectional | 5V-tolerant I/O (5T); default SMC_NOE and DMC_DQ12, remap USART2_RTS. |
| 86 | PD5 | bidirectional | 5V-tolerant I/O (5T); default SMC_NWE and DMC_DQ13, remap USART2_TX. |
| 87 | PD6 | bidirectional | 5V-tolerant I/O (5T); default SMC_NWAIT and DMC_DQ14, remap USART2_RX. |
| 88 | PD7 | bidirectional | 5V-tolerant I/O (5T); default SMC_NE1 and SMC_NCE2, remap USART2_CK. |
| 89 | PB3 | bidirectional | 5V-tolerant I/O (5T); default SPI3_SCK and I2S3_CK (JTDO), remap TRACESWO, TMR2_CH2, SPI1_SCK. |
| 90 | PB4 | bidirectional | 5V-tolerant I/O (5T); default SPI3_MISO (NJTRST), remap TMR3_CH1, SPI1_MISO. |
| 91 | PB5 | bidirectional | Standard I/O (STD); default I2C1_SMBAI, SPI3_MOSI and I2S3_SD, remap TMR3_CH2, SPI1_MOSI, CAN2_RX. |
| 92 | PB6 | bidirectional | 5V-tolerant I/O (5T); default I2C1_SCL, I2C3_SCL and TMR4_CH1, remap USART1_TX, CAN2_TX. |
| 93 | PB7 | bidirectional | 5V-tolerant I/O (5T); default I2C1_SDA, I2C3_SDA, SMC_NADV and TMR4_CH2, remap USART1_RX. |
| 94 | BOOT0 | input | Boot mode select pin, sampled at startup to choose main flash, bootloader or SRAM boot. |
| 95 | PB8 | bidirectional | 5V-tolerant I/O (5T); default TMR4_CH3 and SDIO_D4, remap I2C1_SCL, I2C3_SCL, CAN1_RX. |
| 96 | PB9 | bidirectional | 5V-tolerant I/O (5T); default TMR4_CH4 and SDIO_D5, remap I2C1_SDA, I2C3_SDA, CAN1_TX. |
| 97 | PE0 | bidirectional | 5V-tolerant I/O (5T); default TMR4_ETR and SMC_NBL0. |
| 98 | PE1 | bidirectional | 5V-tolerant I/O (5T); default SMC_NBL1. |
| 99 | VSS_3 | power_in | Digital ground pin. |
| 100 | VDD_3 | power_in | Digital supply pin, 2.0~3.6V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Geehy |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |

## CAD (KiCad official)

- Symbol: `APM32E103VET6`
- Footprint: `Package_QFP:LQFP-100_14x14mm_P0.5mm`
- 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files: `apm32e103vet6-etched.step` / `apm32e103vet6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `apm32e103vet6.step` / `apm32e103vet6.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Geehy datasheet](docs/apm32e103vet6-datasheet.pdf) (71 pp, sha256 `c83e8dd35e2b9455`, retrieved 2026-10-28, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/apm32e103vet6-datasheet.pdf)