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APM32E103VCT6

Public Made by Adom

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Geehy Microcontroller Units (MCUs/MPUs/SOCs), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersapm32e103vct6factory-2.0.0extractor-text

Verified APM32E103VCT6

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier lcsc, 100 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: APM32E103VCT6 · LQFP-100(14x14) · 100 pins
  • ✓copper: 100 copper pads, none touching another net
  • ✓datasheet: all 100 pin names found in the 72-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: LQFP-100_14x14mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-nifu1646/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 100 pins = 100 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 100 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ apm32e103vct6.kicad_sym✓ apm32e103vct6.kicad_mod✓ apm32e103vct6.step
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APM32E103VCT6

Geehy · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-100(14x14)

APM32E103VCT6 from Geehy, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5V tolerant I/O (5T) with default functions TRACECK and SMC_A23.
2 PE3 bidirectional 5V tolerant I/O (5T) with default functions TRACED0, SMC_A19 and DMC_DQ4.
3 PE4 bidirectional 5V tolerant I/O (5T) with default functions TRACED1 and SMC_A20.
4 PE5 bidirectional 5V tolerant I/O (5T) with default functions TRACED2, SMC_A21 and DMC_DQ5.
5 PE6 bidirectional 5V tolerant I/O (5T) with default functions TRACED3, SMC_A22 and DMC_DQ6.
6 VBAT power_in Backup domain supply, 1.8V to 3.6V, powers RTC, external 32KHz oscillator and backup registers when VDD is off.
7 PC13-TAMPER-RTC bidirectional Standard I/O on the power switch with sink current limited to 3mA; as output it runs only at 2MHz with max 30pF load and cannot source current such as an LED.
8 PC14-OSC32_IN bidirectional Standard I/O on the power switch limited to 3mA; default function OSC32_IN for the 32.768KHz oscillator, with the same output limits as PC13.
9 PC15-OSC32_OUT bidirectional Standard I/O on the power switch limited to 3mA; default function OSC32_OUT for the 32.768KHz oscillator, with the same output limits as PC13.
10 VSS_5 power_in Digital ground pin, connect to VSS.
11 VDD_5 power_in Digital supply pin, 2.0V to 3.6V.
12 OSC_IN input HSE oscillator input for a 4 to 16MHz crystal or ceramic resonator.
13 OSC_OUT output HSE oscillator output for a 4 to 16MHz crystal or ceramic resonator.
14 NRST bidirectional Reset pin with built-in weak pull-up of 30 to 50 kOhm; VIL max 0.8V and VIH min 2V.
15 PC0 bidirectional Standard analog I/O (STDA) with default function ADC123_IN10.
16 PC1 bidirectional Standard analog I/O (STDA) with default function ADC123_IN11.
17 PC2 bidirectional Standard analog I/O (STDA) with default function ADC123_IN12.
18 PC3 bidirectional Standard analog I/O (STDA) with default function ADC123_IN13.
19 VSSA power_in Analog ground, must be connected to VSS.
20 VREF- power_in Negative reference voltage pin for ADC and DAC; no further limits are stated in the supplied text.
21 VREF+ power_in Positive reference voltage pin for ADC and DAC, connected as shown in the power scheme figure.
22 VDDA power_in Analog supply 2.0V to 3.6V; must be at least 2.4V when ADC or DAC is used.
23 PA0-WKUP bidirectional Standard analog I/O (STDA) with default functions WKUP, USART2_CTS, ADC123_IN0, TMR2_CH1_ETR, TMR5_CH1 and TMR8_ETR.
24 PA1 bidirectional Standard analog I/O (STDA) with default functions USART2_RTS, ADC123_IN1, TMR5_CH2 and TMR2_CH2.
25 PA2 bidirectional Standard analog I/O (STDA) with default functions USART2_TX, TMR5_CH3, ADC123_IN2 and TMR2_CH3.
26 PA3 bidirectional Standard analog I/O (STDA) with default functions USART2_RX, TMR5_CH4 and ADC123_IN3.
27 VSS_4 power_in Digital ground pin, connect to VSS.
28 VDD_4 power_in Digital supply pin, 2.0V to 3.6V.
29 PA4 bidirectional Port A I/O pin; default alternate functions are on datasheet pages not supplied.
30 PA5 bidirectional Port A I/O pin; default alternate functions are on datasheet pages not supplied.
31 PA6 bidirectional Port A I/O pin; default alternate functions are on datasheet pages not supplied.
32 PA7 bidirectional Port A I/O pin; default alternate functions are on datasheet pages not supplied.
33 PC4 bidirectional Port C I/O pin; default alternate functions are on datasheet pages not supplied.
34 PC5 bidirectional Port C I/O pin; default alternate functions are on datasheet pages not supplied.
35 PB0 bidirectional Port B I/O pin; default alternate functions are on datasheet pages not supplied.
36 PB1 bidirectional Port B I/O pin; default alternate functions are on datasheet pages not supplied.
37 PB2 bidirectional Port B I/O pin; default alternate functions are on datasheet pages not supplied.
38 PE7 bidirectional Port E I/O pin; default alternate functions are on datasheet pages not supplied.
39 PE8 bidirectional Port E I/O pin; default alternate functions are on datasheet pages not supplied.
40 PE9 bidirectional Port E I/O pin; default alternate functions are on datasheet pages not supplied.
41 PE10 bidirectional Port E I/O pin; default alternate functions are on datasheet pages not supplied.
42 PE11 bidirectional Port E I/O pin; default alternate functions are on datasheet pages not supplied.
43 PE12 bidirectional Port E I/O pin; default alternate functions are on datasheet pages not supplied.
44 PE13 bidirectional Port E I/O pin; default alternate functions are on datasheet pages not supplied.
45 PE14 bidirectional Port E I/O pin; default alternate functions are on datasheet pages not supplied.
46 PE15 bidirectional Port E I/O pin; default alternate functions are on datasheet pages not supplied.
47 PB10 bidirectional Port B I/O pin; default alternate functions are on datasheet pages not supplied.
48 PB11 bidirectional Port B I/O pin; default alternate functions are on datasheet pages not supplied.
49 VSS_1 power_in Digital ground pin, connect to VSS.
50 VDD_1 power_in Digital supply pin, 2.0V to 3.6V.
51 PB12 bidirectional Port B I/O pin; default alternate functions are on datasheet pages not supplied.
52 PB13 bidirectional Port B I/O pin; default alternate functions are on datasheet pages not supplied.
53 PB14 bidirectional Port B I/O pin; default alternate functions are on datasheet pages not supplied.
54 PB15 bidirectional Port B I/O pin; default alternate functions are on datasheet pages not supplied.
55 PD8 bidirectional Port D I/O pin; default alternate functions are on datasheet pages not supplied.
56 PD9 bidirectional Port D I/O pin; default alternate functions are on datasheet pages not supplied.
57 PD10 bidirectional Port D I/O pin; default alternate functions are on datasheet pages not supplied.
58 PD11 bidirectional Port D I/O pin; default alternate functions are on datasheet pages not supplied.
59 PD12 bidirectional Port D I/O pin; default alternate functions are on datasheet pages not supplied.
60 PD13 bidirectional Port D I/O pin; default alternate functions are on datasheet pages not supplied.
61 PD14 bidirectional Port D I/O pin; default alternate functions are on datasheet pages not supplied.
62 PD15 bidirectional Port D I/O pin; default alternate functions are on datasheet pages not supplied.
63 PC6 bidirectional Port C I/O pin; default alternate functions are on datasheet pages not supplied.
64 PC7 bidirectional Port C I/O pin; default alternate functions are on datasheet pages not supplied.
65 PC8 bidirectional Port C I/O pin; default alternate functions are on datasheet pages not supplied.
66 PC9 bidirectional Port C I/O pin; default alternate functions are on datasheet pages not supplied.
67 PA8 bidirectional Port A I/O pin; default alternate functions are on datasheet pages not supplied.
68 PA9 bidirectional Port A I/O pin; default alternate functions are on datasheet pages not supplied.
69 PA10 bidirectional Port A I/O pin; default alternate functions are on datasheet pages not supplied.
70 PA11 bidirectional Port A I/O pin; default alternate functions are on datasheet pages not supplied.
71 PA12 bidirectional Port A I/O pin; default alternate functions are on datasheet pages not supplied.
72 PA13 bidirectional Port A I/O pin; default alternate functions are on datasheet pages not supplied.
73 NC unconnected Not connected pin on the LQFP100 package.
74 VSS_2 power_in Digital ground pin, connect to VSS.
75 VDD_2 power_in Digital supply pin, 2.0V to 3.6V.
76 PA14 bidirectional Port A I/O pin; default alternate functions are on datasheet pages not supplied.
77 PA15 bidirectional Port A I/O pin; default alternate functions are on datasheet pages not supplied.
78 PC10 bidirectional Port C I/O pin; default alternate functions are on datasheet pages not supplied.
79 PC11 bidirectional Port C I/O pin; default alternate functions are on datasheet pages not supplied.
80 PC12 bidirectional Port C I/O pin; default alternate functions are on datasheet pages not supplied.
81 PD0 bidirectional 5V tolerant I/O (5T) with default functions SMC_D2 and CAN_RX; output mode limited to 50MHz.
82 PD1 bidirectional 5V tolerant I/O (5T) with default functions SMC_D3 and CAN_TX; output mode limited to 50MHz.
83 PD2 bidirectional 5V tolerant I/O (5T) with default functions TMR3_ETR, UART5_RX, SDIO_CMD and DMC_DQ10.
84 PD3 bidirectional 5V tolerant I/O (5T) with default functions SMC_CLK and DMC_DQ11; remap USART2_CTS.
85 PD4 bidirectional 5V tolerant I/O (5T) with default functions SMC_NOE and DMC_DQ12; remap USART2_RTS.
86 PD5 bidirectional 5V tolerant I/O (5T) with default functions SMC_NWE and DMC_DQ13; remap USART2_TX.
87 PD6 bidirectional 5V tolerant I/O (5T) with default functions SMC_NWAIT and DMC_DQ14; remap USART2_RX.
88 PD7 bidirectional 5V tolerant I/O (5T) with default functions SMC_NE1 and SMC_NCE2; remap USART2_CK.
89 PB3 bidirectional 5V tolerant I/O (5T) with default functions SPI3_SCK, I2S3_CK and JTDO; remap PB3, TRACESWO, TMR2_CH2 and SPI1_SCK.
90 PB4 bidirectional 5V tolerant I/O (5T) with default functions SPI3_MISO and NJTRST; remap PB4, TMR3_CH1 and SPI1_MISO.
91 PB5 bidirectional Standard I/O (STD) with default functions I2C1_SMBAI, SPI3_MOSI and I2S3_SD; remap TMR3_CH2, SPI1_MOSI and CAN2_RX.
92 PB6 bidirectional 5V tolerant I/O (5T) with default functions I2C1_SCL, I2C3_SCL and TMR4_CH1; remap USART1_TX and CAN2_TX.
93 PB7 bidirectional 5V tolerant I/O (5T) with default functions I2C1_SDA, I2C3_SDA, SMC_NADV and TMR4_CH2; remap USART1_RX.
94 BOOT0 input Boot pin whose level selects main Flash, BootLoader or built-in SRAM boot mode at startup.
95 PB8 bidirectional 5V tolerant I/O (5T) with default functions TMR4_CH3 and SDIO_D4; remap I2C1_SCL, I2C3_SCL and CAN1_RX.
96 PB9 bidirectional 5V tolerant I/O (5T) with default functions TMR4_CH4 and SDIO_D5; remap I2C1_SDA, I2C3_SDA and CAN1_TX.
97 PE0 bidirectional 5V tolerant I/O (5T) with default functions TMR4_ETR and SMC_NBL0.
98 PE1 bidirectional 5V tolerant I/O (5T) with default function SMC_NBL1.
99 VSS_3 power_in Digital ground pin, connect to VSS.
100 VDD_3 power_in Digital supply pin, 2.0V to 3.6V.

Key specifications

Parameter Value
Manufacturer Geehy
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: APM32E103VCT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: apm32e103vct6-etched.step / apm32e103vct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); apm32e103vct6.step / apm32e103vct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Geehy datasheet (72 pp, sha256 7075131878651c7b, retrieved 2026-11-05, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF