component
APL5934DKAI-TRG
Public Made by Adomby adom
Anpec Elec Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no…
249e7b6
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{
"schema": "adom.pads/1",
"slug": "apl5934dkai-trg",
"footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm",
"generated_from": {
"footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm@sha256:8c876531921cc0f8",
"pins": "page.json:component.pins",
"overrides": null
},
"pin1": {
"pad": "1",
"at": [
-2.48,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm@sha256:8c876531921cc0f8"
},
"pad_count": 9,
"symbol_pins": [
"1",
"2",
"3",
"4",
"5",
"6",
"7",
"8",
"9"
],
"paste_apertures": 4,
"issues": [],
"pads": [
{
"pad": "1",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.48,
-1.905
],
"rot": 0.0,
"size": [
1.94,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "1",
"name": "POK",
"type": "output",
"description": "Power-OK signal output. Open-drain output that indicates the status of VOUT by sensing the FB voltage; pulled low when VOUT is outside the Power-OK window (rising POK threshold ~92% of nominal VFB, POK pull-low voltage ~0.25V at 5mA sink). Requires an external pull-up resistor.",
"is_pin1": true,
"source": {
"geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "2",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.48,
-0.635
],
"rot": 0.0,
"size": [
1.94,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "2",
"name": "EN",
"type": "input",
"description": "Active-high enable control pin. Holding EN below the enable threshold (~0.8V typical) shuts down the output; re-enabling triggers a new soft-start cycle. An internal ~3µA pull-low current pulls EN low when left open (initial-off for the /D variant), disabling the regulator by default.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "3",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.48,
0.635
],
"rot": 0.0,
"size": [
1.94,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "3",
"name": "VIN",
"type": "power_in",
"description": "Main power supply input (1.2V ~ 5.5V) used for voltage conversion to VOUT. A ≥10µF decoupling capacitor is recommended close to this pin to filter noise and improve transient response. The voltage on VIN is monitored by the Power-On-Reset circuit (rising VIN POR threshold ~0.9V).",
"is_pin1": false,
"source": {
"geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "4",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.48,
1.905
],
"rot": 0.0,
"size": [
1.94,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "4",
"name": "VCNTL",
"type": "power_in",
"description": "Bias voltage input for the internal control circuitry (3.0V ~ 5.5V, +5V recommended). A 0.1µF decoupling capacitor is typically connected near this pin. VCNTL is also monitored by the Power-On-Reset circuit (rising VCNTL POR threshold ~2.7V).",
"is_pin1": false,
"source": {
"geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "5",
"kind": "smd",
"shape": "roundrect",
"at": [
2.48,
1.905
],
"rot": 0.0,
"size": [
1.94,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "5",
"name": "NC",
"type": "unconnected",
"description": "No Connection. Leave this pin floating or tie to a convenient net; it has no internal function on the APL5934B/D SOP-8P package.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "6",
"kind": "smd",
"shape": "roundrect",
"at": [
2.48,
0.635
],
"rot": 0.0,
"size": [
1.94,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "6",
"name": "VOUT",
"type": "power_out",
"description": "Regulated output pin (0.8V to VIN−VDROP, up to 3A continuous / 4A peak). Requires a minimum 10µF output capacitor (MLCC applicable) for stability and transient response; total COUT scales with load per the datasheet (8-1100µF at 3A). During shutdown an internal ~85Ω pull-down MOSFET quickly discharges VOUT.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "7",
"kind": "smd",
"shape": "roundrect",
"at": [
2.48,
-0.635
],
"rot": 0.0,
"size": [
1.94,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "7",
"name": "FB",
"type": "input",
"description": "Voltage feedback pin. Connect to the tap of an external resistor divider from VOUT to set the output voltage against the 0.8V internal reference (VOUT = 0.8V × (1 + R1/R2)). FB input current is ±100nA max.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "8",
"kind": "smd",
"shape": "roundrect",
"at": [
2.48,
-1.905
],
"rot": 0.0,
"size": [
1.94,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "8",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin for all internal circuitry. All voltage levels are measured with respect to this pin.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "9",
"kind": "smd",
"shape": "rect",
"at": [
0.0,
0.0
],
"rot": 0.0,
"size": [
2.62,
3.51
],
"layers": [],
"thermal": true,
"pin": "9",
"name": "GND",
"type": "power_in",
"description": "Exposed thermal pad on the underside of the SOP-8P package. Connect to the system ground plane with a large copper area for heat dissipation into the ambient air.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
}
]
}