component
APL5934DKAI-TRG
Public Made by Adomby adom
Anpec Elec Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
fix footprint: SOIC-8_3.9x4.9mm_P1.27mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm (ep_dropped, 8 pins; datasheet EP 3.0x3.51mm, land 2.62x3.51mm (Δ0.38mm))
4 files changed
+69−40
README.md+1−1@@ -42,7 +42,7 @@ APL5934DKAI-TRG from Anpec Elec, in a SOP-8-EP. Pinout and pin descriptions extr ## CAD (KiCad official) - Symbol: `APL5934DKAI-TRG`-- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm` - 3D model: SOP-8-EP (KiCad packages3D, STEP) ## Provenance
apl5934dkai-trg.kicad_mod+51−20@@ -1,8 +1,8 @@-(footprint "SOIC-8_3.9x4.9mm_P1.27mm"+(footprint "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm" (version 20260206) (generator "kicad-footprint-generator") (layer "F.Cu")- (descr "SOIC, 8 Pin (JEDEC MS-012AA, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_8.pdf)")+ (descr "SOIC, 8 Pin (https://www.monolithicpower.com/en/documentview/productdocument/index/version/2/document_type/Datasheet/lang/en/sku/MP2303A/document_id/494#page=14)") (tags "SOIC SO") (property "Reference" "REF**" (at 0 -3.4 0)@@ -14,7 +14,7 @@ ) ) )- (property "Value" "SOIC-8_3.9x4.9mm_P1.27mm"+ (property "Value" "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm" (at 0 3.4 0) (layer "F.Fab") (effects@@ -237,56 +237,87 @@ ) ) )+ (pad "" smd roundrect+ (at -0.655 -0.875)+ (size 1.06 1.41)+ (layers "F.Paste")+ (roundrect_rratio 0.235849)+ )+ (pad "" smd roundrect+ (at -0.655 0.875)+ (size 1.06 1.41)+ (layers "F.Paste")+ (roundrect_rratio 0.235849)+ )+ (pad "" smd roundrect+ (at 0.655 -0.875)+ (size 1.06 1.41)+ (layers "F.Paste")+ (roundrect_rratio 0.235849)+ )+ (pad "" smd roundrect+ (at 0.655 0.875)+ (size 1.06 1.41)+ (layers "F.Paste")+ (roundrect_rratio 0.235849)+ ) (pad "1" smd roundrect- (at -2.475 -1.905)- (size 1.95 0.6)+ (at -2.48 -1.905)+ (size 1.94 0.6) (layers "F.Cu" "F.Mask" "F.Paste") (roundrect_rratio 0.25) ) (pad "2" smd roundrect- (at -2.475 -0.635)- (size 1.95 0.6)+ (at -2.48 -0.635)+ (size 1.94 0.6) (layers "F.Cu" "F.Mask" "F.Paste") (roundrect_rratio 0.25) ) (pad "3" smd roundrect- (at -2.475 0.635)- (size 1.95 0.6)+ (at -2.48 0.635)+ (size 1.94 0.6) (layers "F.Cu" "F.Mask" "F.Paste") (roundrect_rratio 0.25) ) (pad "4" smd roundrect- (at -2.475 1.905)- (size 1.95 0.6)+ (at -2.48 1.905)+ (size 1.94 0.6) (layers "F.Cu" "F.Mask" "F.Paste") (roundrect_rratio 0.25) ) (pad "5" smd roundrect- (at 2.475 1.905)- (size 1.95 0.6)+ (at 2.48 1.905)+ (size 1.94 0.6) (layers "F.Cu" "F.Mask" "F.Paste") (roundrect_rratio 0.25) ) (pad "6" smd roundrect- (at 2.475 0.635)- (size 1.95 0.6)+ (at 2.48 0.635)+ (size 1.94 0.6) (layers "F.Cu" "F.Mask" "F.Paste") (roundrect_rratio 0.25) ) (pad "7" smd roundrect- (at 2.475 -0.635)- (size 1.95 0.6)+ (at 2.48 -0.635)+ (size 1.94 0.6) (layers "F.Cu" "F.Mask" "F.Paste") (roundrect_rratio 0.25) ) (pad "8" smd roundrect- (at 2.475 -1.905)- (size 1.95 0.6)+ (at 2.48 -1.905)+ (size 1.94 0.6) (layers "F.Cu" "F.Mask" "F.Paste") (roundrect_rratio 0.25) )+ (pad "9" smd rect+ (at 0 0)+ (size 2.62 3.51)+ (property pad_prop_heatsink)+ (layers "F.Cu" "F.Mask")+ (zone_connect 2)+ ) (embedded_fonts no)- (model "${KICAD10_3DMODEL_DIR}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.step"+ (model "${KICAD10_3DMODEL_DIR}/Package_SO.3dshapes/SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.62x3.51mm.step" (offset (xyz 0 0 0) )
apl5934dkai-trg.lbr+11−10@@ -54,22 +54,23 @@ <packages> <package name="APL5934DKAI-TRG"> <description>APL5934DKAI-TRG</description>- <smd name="1" x="-2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="2" x="-2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="3" x="-2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="4" x="-2.4750" y="-1.9050" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="5" x="2.4750" y="-1.9050" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/>- <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>+ <smd name="1" x="-2.4800" y="1.9050" dx="1.9400" dy="0.6000" layer="1"/>+ <smd name="2" x="-2.4800" y="0.6350" dx="1.9400" dy="0.6000" layer="1"/>+ <smd name="3" x="-2.4800" y="-0.6350" dx="1.9400" dy="0.6000" layer="1"/>+ <smd name="4" x="-2.4800" y="-1.9050" dx="1.9400" dy="0.6000" layer="1"/>+ <smd name="5" x="2.4800" y="-1.9050" dx="1.9400" dy="0.6000" layer="1"/>+ <smd name="6" x="2.4800" y="-0.6350" dx="1.9400" dy="0.6000" layer="1"/>+ <smd name="7" x="2.4800" y="0.6350" dx="1.9400" dy="0.6000" layer="1"/>+ <smd name="8" x="2.4800" y="1.9050" dx="1.9400" dy="0.6000" layer="1"/>+ <smd name="9" x="0.0000" y="-0.0000" dx="2.6200" dy="3.5100" layer="1"/> <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/> <wire x1="2.0600" y1="2.5600" x2="2.0600" y2="2.4650" width="0.1200" layer="21"/> <wire x1="2.0600" y1="-2.4650" x2="2.0600" y2="-2.5600" width="0.1200" layer="21"/> <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/>- <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">>NAME</text>- <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">>VALUE</text>+ <text x="0" y="3.475" size="1.27" layer="25" align="bottom-center">>NAME</text>+ <text x="0" y="-3.475" size="1.27" layer="27" align="top-center">>VALUE</text> </package> </packages> <symbols>
page.json+6−9@@ -38,19 +38,19 @@ "number": "2", "name": "EN", "type": "input",- "description": "Active-high enable control pin. Holding EN below the enable threshold (~0.8V typical) shuts down the output; re-enabling triggers a new soft-start cycle. An internal ~3µA pull-low current pulls EN low when left open (initial-off for the /D variant), disabling the regulator by default."+ "description": "Active-high enable control pin. Holding EN below the enable threshold (~0.8V typical) shuts down the output; re-enabling triggers a new soft-start cycle. An internal ~3\u00b5A pull-low current pulls EN low when left open (initial-off for the /D variant), disabling the regulator by default." }, { "number": "3", "name": "VIN", "type": "power_in",- "description": "Main power supply input (1.2V ~ 5.5V) used for voltage conversion to VOUT. A ≥10µF decoupling capacitor is recommended close to this pin to filter noise and improve transient response. The voltage on VIN is monitored by the Power-On-Reset circuit (rising VIN POR threshold ~0.9V)."+ "description": "Main power supply input (1.2V ~ 5.5V) used for voltage conversion to VOUT. A \u226510\u00b5F decoupling capacitor is recommended close to this pin to filter noise and improve transient response. The voltage on VIN is monitored by the Power-On-Reset circuit (rising VIN POR threshold ~0.9V)." }, { "number": "4", "name": "VCNTL", "type": "power_in",- "description": "Bias voltage input for the internal control circuitry (3.0V ~ 5.5V, +5V recommended). A 0.1µF decoupling capacitor is typically connected near this pin. VCNTL is also monitored by the Power-On-Reset circuit (rising VCNTL POR threshold ~2.7V)."+ "description": "Bias voltage input for the internal control circuitry (3.0V ~ 5.5V, +5V recommended). A 0.1\u00b5F decoupling capacitor is typically connected near this pin. VCNTL is also monitored by the Power-On-Reset circuit (rising VCNTL POR threshold ~2.7V)." }, { "number": "5",@@ -62,13 +62,13 @@ "number": "6", "name": "VOUT", "type": "power_out",- "description": "Regulated output pin (0.8V to VIN−VDROP, up to 3A continuous / 4A peak). Requires a minimum 10µF output capacitor (MLCC applicable) for stability and transient response; total COUT scales with load per the datasheet (8-1100µF at 3A). During shutdown an internal ~85Ω pull-down MOSFET quickly discharges VOUT."+ "description": "Regulated output pin (0.8V to VIN\u2212VDROP, up to 3A continuous / 4A peak). Requires a minimum 10\u00b5F output capacitor (MLCC applicable) for stability and transient response; total COUT scales with load per the datasheet (8-1100\u00b5F at 3A). During shutdown an internal ~85\u03a9 pull-down MOSFET quickly discharges VOUT." }, { "number": "7", "name": "FB", "type": "input",- "description": "Voltage feedback pin. Connect to the tap of an external resistor divider from VOUT to set the output voltage against the 0.8V internal reference (VOUT = 0.8V × (1 + R1/R2)). FB input current is ±100nA max."+ "description": "Voltage feedback pin. Connect to the tap of an external resistor divider from VOUT to set the output voltage against the 0.8V internal reference (VOUT = 0.8V \u00d7 (1 + R1/R2)). FB input current is \u00b1100nA max." }, { "number": "8",@@ -144,8 +144,5 @@ "docs/apl5934dkai-trg-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": {- "public": true- }+ ] }