component
APL5934DKAI-TRG
Public Made by Adomby adom
Anpec Elec Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+9−6@@ -38,19 +38,19 @@ "number": "2", "name": "EN", "type": "input",- "description": "Active-high enable control pin. Holding EN below the enable threshold (~0.8V typical) shuts down the output; re-enabling triggers a new soft-start cycle. An internal ~3\u00b5A pull-low current pulls EN low when left open (initial-off for the /D variant), disabling the regulator by default."+ "description": "Active-high enable control pin. Holding EN below the enable threshold (~0.8V typical) shuts down the output; re-enabling triggers a new soft-start cycle. An internal ~3µA pull-low current pulls EN low when left open (initial-off for the /D variant), disabling the regulator by default." }, { "number": "3", "name": "VIN", "type": "power_in",- "description": "Main power supply input (1.2V ~ 5.5V) used for voltage conversion to VOUT. A \u226510\u00b5F decoupling capacitor is recommended close to this pin to filter noise and improve transient response. The voltage on VIN is monitored by the Power-On-Reset circuit (rising VIN POR threshold ~0.9V)."+ "description": "Main power supply input (1.2V ~ 5.5V) used for voltage conversion to VOUT. A ≥10µF decoupling capacitor is recommended close to this pin to filter noise and improve transient response. The voltage on VIN is monitored by the Power-On-Reset circuit (rising VIN POR threshold ~0.9V)." }, { "number": "4", "name": "VCNTL", "type": "power_in",- "description": "Bias voltage input for the internal control circuitry (3.0V ~ 5.5V, +5V recommended). A 0.1\u00b5F decoupling capacitor is typically connected near this pin. VCNTL is also monitored by the Power-On-Reset circuit (rising VCNTL POR threshold ~2.7V)."+ "description": "Bias voltage input for the internal control circuitry (3.0V ~ 5.5V, +5V recommended). A 0.1µF decoupling capacitor is typically connected near this pin. VCNTL is also monitored by the Power-On-Reset circuit (rising VCNTL POR threshold ~2.7V)." }, { "number": "5",@@ -62,13 +62,13 @@ "number": "6", "name": "VOUT", "type": "power_out",- "description": "Regulated output pin (0.8V to VIN\u2212VDROP, up to 3A continuous / 4A peak). Requires a minimum 10\u00b5F output capacitor (MLCC applicable) for stability and transient response; total COUT scales with load per the datasheet (8-1100\u00b5F at 3A). During shutdown an internal ~85\u03a9 pull-down MOSFET quickly discharges VOUT."+ "description": "Regulated output pin (0.8V to VIN−VDROP, up to 3A continuous / 4A peak). Requires a minimum 10µF output capacitor (MLCC applicable) for stability and transient response; total COUT scales with load per the datasheet (8-1100µF at 3A). During shutdown an internal ~85Ω pull-down MOSFET quickly discharges VOUT." }, { "number": "7", "name": "FB", "type": "input",- "description": "Voltage feedback pin. Connect to the tap of an external resistor divider from VOUT to set the output voltage against the 0.8V internal reference (VOUT = 0.8V \u00d7 (1 + R1/R2)). FB input current is \u00b1100nA max."+ "description": "Voltage feedback pin. Connect to the tap of an external resistor divider from VOUT to set the output voltage against the 0.8V internal reference (VOUT = 0.8V × (1 + R1/R2)). FB input current is ±100nA max." }, { "number": "8",@@ -144,5 +144,8 @@ "docs/apl5934dkai-trg-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }