# APG080N12

**ALLPOWER(ShenZhen Quan Li Semiconductor)** · MOSFETs · TO-220

APG080N12 from ALLPOWER(ShenZhen Quan Li Semiconductor), in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; marking and pin assignment shows G as pin 1, with VGS rated ±20V and gate threshold 2.0V min to 4.0V max at VDS=VGS, ID=250µA. |
| 2 | D | passive | Drain; pin 2 per marking and pin assignment, rated VDS 120V and continuous ID 106A at 25°C (also connected to the tab). |
| 3 | S | passive | Source; pin 3 per marking and pin assignment, with diode forward current IS of 106A max. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | ALLPOWER(ShenZhen Quan Li Semiconductor) |
| Package | TO-220 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `APG080N12`
- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`
- 3D model: TO-220 (KiCad packages3D, STEP)
- 3D model files: `apg080n12-etched.step` / `apg080n12-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `apg080n12.step` / `apg080n12.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [ALLPOWER(ShenZhen Quan Li Semiconductor) datasheet](docs/apg080n12-datasheet.pdf) (7 pp, sha256 `9ee963fd72a76253`, retrieved 2026-10-24, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/apg080n12-datasheet.pdf)