component
AP9101CAK-ABTRG1
Public Made by Adomby adom
Diodes Incorporated Battery Management, SOT-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
AP9101CAK-ABTRG1
Diodes Incorporated · Battery Management · SOT-25
AP9101CAK-ABTRG1 from Diodes Incorporated, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VM | input | Charger negative input pin, which must stay within the datasheet charger input voltage of -0.3 V to 30 V relative to VDD (absolute maximum), with 5.5 V as the recommended maximum. |
| 2 | VDD | power_in | Positive power input pin, with recommended supply voltage between VDD and VSS of 1.5 V to 5.5 V and an absolute maximum of 12 V. |
| 3 | VSS | power_in | Negative power input pin and the reference ground for the supply voltage between VDD and VSS. |
| 4 | DO | output | FET gate control pin for discharge, with output voltage limited to VSS-0.3 V to VDD+0.3 V. |
| 5 | CO | output | FET gate control pin for charge, with output voltage limited to VM-0.3 V to VDD+0.3 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-25 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | , ESD (Human Body Model) 2,000 V Note: 5. Stresses greater than those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only, and | 3 |
CAD (KiCad official)
- Symbol:
AP9101CAK-ABTRG1 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-25 (KiCad packages3D, STEP)
- 3D model files:
ap9101cak-abtrg1-etched.step/ap9101cak-abtrg1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap9101cak-abtrg1.step/ap9101cak-abtrg1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (24 pp, sha256
3edf9f531749ca57, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AP9101CAK-ABTRG1
**Diodes Incorporated** · Battery Management · SOT-25
AP9101CAK-ABTRG1 from Diodes Incorporated, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VM | input | Charger negative input pin, which must stay within the datasheet charger input voltage of -0.3 V to 30 V relative to VDD (absolute maximum), with 5.5 V as the recommended maximum. |
| 2 | VDD | power_in | Positive power input pin, with recommended supply voltage between VDD and VSS of 1.5 V to 5.5 V and an absolute maximum of 12 V. |
| 3 | VSS | power_in | Negative power input pin and the reference ground for the supply voltage between VDD and VSS. |
| 4 | DO | output | FET gate control pin for discharge, with output voltage limited to VSS-0.3 V to VDD+0.3 V. |
| 5 | CO | output | FET gate control pin for charge, with output voltage limited to VM-0.3 V to VDD+0.3 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-25 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | |, ESD (Human Body Model) 2,000 V Note: 5. Stresses greater than those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only, and | 3 |
## CAD (KiCad official)
- Symbol: `AP9101CAK-ABTRG1`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-25 (KiCad packages3D, STEP)
- 3D model files: `ap9101cak-abtrg1-etched.step` / `ap9101cak-abtrg1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ap9101cak-abtrg1.step` / `ap9101cak-abtrg1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/AP9101CAK-ABTRG1.pdf) (24 pp, sha256 `3edf9f531749ca57`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ap9101cak-abtrg1-datasheet.pdf)