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AP7583AQ-50MP-13

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Diodes Incorporated Linear Voltage Regulators (LDO), MSOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AP7583AQ-50MP-13

Diodes Incorporated · Linear Voltage Regulators (LDO) · MSOP-8-EP

AP7583AQ-50MP-13 from Diodes Incorporated, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input voltage pin, operating range 3.0V to 42V (absolute maximum 45V).
2 EN input Active-high enable input; logic-low at most 0.3V turns the device off, logic-high at least 1.7V (up to VIN) turns it on, and it may be tied to VIN if unused.
3 NC unconnected Not connected internally; connecting it to GND is recommended to maximize PCB copper for thermal dissipation.
4 GND power_in Ground.
5 GND power_in Ground.
6 FB/NC unconnected Feedback pin used only on the adjustable version to set the output voltage through a resistor divider; this 5.0V fixed version has no feedback function, so it is treated as no-connect.
7 PG output Power-good output with one internal pull-up resistor; it is driven low when VOUT is below the PG threshold and goes high-impedance when VOUT exceeds it.
8 VOUT power_out Regulated output voltage, fixed at 5.0V for this version, with up to 300mA output current.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package MSOP-8-EP
Category Power Management
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage Variation from Specified VOUT VOUT 98.5 101.5 % -40°C ≤ TJ ≤ +125°C, IOUT = 1mA, VIN = 14V, VOUT = 5V (percent of specified VOUT) 5
Input Voltage VIN 3 42 V 5
Current Limit ILIMIT 310 510 690 mA VOUT Short to 90% x VOUT 5
Line Regulation ΔVOUT/ΔVIN -10 10 mV VIN = VOUT + 1V to 40V, IOUT = 1mA 5
Load Regulation ΔVOUT/VOUT -20 20 mV 1mA ≤ IOUT ≤ 300mA 5
Dropout Voltage VDROP 320 500 mV IOUT = 300mA @VOUT = 5V 5
Quiescent Current IQ 3 6 µA AP7583AQ IOUT = 0 5
Shutdown Current ISHUTDOWN 0.3 0.5 µA EN = 0 5
EN Input Logic-Low Voltage VIL 0 0.3 V 5
EN Input Logic-High Voltage VIH 1.7 V max printed as VIN 5
VIN Undervoltage Detection UVLO 2.1 2.4 2.7 V Ramp VIN up until the Output Turns on 5
PG Rising Threshold VPGR 90 94 % VFB Rising 5
PG Falling Threshold VPGF 88 92 % VFB Falling 5
PG Sinking Voltage VPGS 0.4 V Sinking Current = 5mA 5
Output Voltage Temperature Coefficient ∆VOUT/(VOUT×∆T) 100 ppm/°C IOUT = 100µA, -40°C ≤ TJ ≤ +125°C (printed ±100) 5
Thermal Shutdown Temperature TOTSD 175 °C 5
Thermal Shutdown Hysteresis THYOTSD 20 °C 5
Power-Supply Rejection Ratio PSRR 70 dB V(Ripple) = 0.5VPP, IOUT = 10mA, frequency = 100Hz, COUT = 2.2µF 5
UVLO Hysteresis 0.2 V Hysteresis 5
Output Voltage Turn-On Delay Time tD 0.8 ms VEN High to VOUT Rising 10% 5
Output Voltage Ramp Up Time tSS 200 µs VOUT Rising 10% to 90% 5
PG React Time tPG 30 µs VOUT 90% to PG Active 5
PG Off Deglitch Time tPGF 3 µs VFB Falling to PG Low / EN Goes Low to PG Low 5
Supply Input Voltage VIN 3 42 V 4
Supply Output Voltage VOUT 1.2 5 V 4
Operating Junction Temperature TJ -40 125 °C 4
Supply Input Voltage VIN -0.3 45 V TA = +25°C 4
Regulated Output Voltage VOUT -0.3 7 V TA = +25°C 4
Output Current IOUT 300 mA TA = +25°C 4
Lead Temperature TLEAD 260 °C Soldering, 10sec 4
Operating Junction Temperature TJ 150 °C TA = +25°C 4
Storage Temperature Range TSTG -40 150 °C 4
ESD Charged Device Model CDM -1500 1500 V printed ±1500 4
ESD Human Body Model HBM -2000 2000 V printed ±2000 4
Thermal Resistance Junction to Ambient θJA 36.1 °C/W MSOP-8EP 4
Thermal Resistance Junction to Case θJC 6.532 °C/W MSOP-8EP 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing Abs HBM ESD (Human Body Model) ±2000 V Notes: 4. a). Stresses beyond those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only and 4
contacts copper reduce noise. For PCB layout, a wide copper trace is required for both IN and GND pins. A lower ESR capacitor type allows the use of less 12

CAD (KiCad official)

  • Symbol: AP7583AQ-50MP-13
  • Footprint: Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm
  • 3D model: MSOP-8-EP (KiCad packages3D, STEP)
  • 3D model files: ap7583aq-50mp-13-etched.step / ap7583aq-50mp-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap7583aq-50mp-13.step / ap7583aq-50mp-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (21 pp, sha256 236be72831d65721, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF