component
AP7387-50Y-13
Public Made by Adomby adom
Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownAP7387-50Y-13
Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89
AP7387-50Y-13 from Diodes Incorporated, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Device ground. The SOT-89 tab (pin 2) is the primary heat-sink tab and is also GND; connect both to the ground plane with generous copper for thermal dissipation. |
| 2 | VIN | power_in | Regulator input supply, 5V to 60V (absolute maximum -0.3V to +80V). Bypass with a 1µF ceramic capacitor to GND placed close to the pin. On the SOT-89 (AP7387-XXY-13) variant, VIN is on the large center tab. |
| 3 | VOUT | power_out | Regulated 5.0V fixed output, ±2% accuracy, up to 150mA (current-limit 250mA typ.). Requires a 1µF minimum (10µF typ.) ceramic output capacitor to GND for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-89 |
| Category | PMIC |
| Pins | 3 |
Ordering variants
AP7387-50Y-13AP7387-50Y-1330Y-13AP7387-50Y-1333Y-13AP7387-50Y-1336Y-13AP7387-50Y-1350YR-13AP7387-50Y-1330YR-13AP7387-50Y-1333YR-13AP7387-50Y-1336YR-13AP7387-50Y-1350W6-7AP7387-50Y-1330W6-7AP7387-50Y-1333W6-7AP7387-50Y-1336W6-7AP7387-50Y-1350WU-7AP7387-50Y-1330WU-7AP7387-50Y-1333WU-7AP7387-50Y-1336WU-7AP7387-50Y-1350FDC-7AP7387-50Y-1330FDC-7AP7387-50Y-1333FDC-7AP7387-50Y-1336FDC-7AP7387-50Y-1350FDCR-7AP7387-50Y-1330FDCR-7AP7387-50Y-1333FDCR-7AP7387-50Y-1336FDCR-7
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 5 | 60 | V | 4 | ||
| Quiescent Current | IGND | 2 | 4 | µA | VIN = 12V, No Load | 4 | |
| Dropout Voltage | VDROP | 700 | 850 | mV | IOUT = 100mA, VOUT = VOUTNOM – 0.1V | 4 | |
| Dropout Voltage | VDROP | 1100 | 1350 | mV | IOUT = 150mA, VOUT = VOUTNOM – 0.1V | 4 | |
| Load Regulation | △VOUT(△IOUT) | 0.02 | 0.025 | %/mA | VIN = 12V, 1mA ≤ IOUT ≤ 100mA | 4 | |
| Load Regulation | △VOUT(△IOUT) | 0.015 | 0.02 | %/mA | VIN = VOUT+2V, 1mA ≤ IOUT ≤ 150mA | 4 | |
| Line Regulation | △VOUT/∆VIN | 0.01 | 0.02 | %/V | VOUTNOM + 0.5 V ≤ VIN ≤ 60V, IOUT = 1mA | 4 | |
| Absolute Maximum Supply Input Voltage | VIN | -0.3 | 80 | V | 3 | ||
| Absolute Maximum Regulated Output Voltage | VOUT | -0.3 | 6 | V | 3 | ||
| Operating Ambient Temperature | TA | -40 | 85 | °C | 3 | ||
| Storage Temperature Range | TSTG | -40 | 150 | °C | 3 | ||
| Operating Junction Temperature | TJ | 150 | °C | 3 | |||
| Lead Temperature | TLEAD | 260 | °C | Soldering, 10sec | 3 | ||
| CDM ESD (Charged Device Model) | CDM ESD | 2 | kV | 3 | |||
| HBM ESD (Human Body Model) | HBM ESD | 4 | kV | 3 | |||
| Input Voltage (Recommended) | VIN | 5 | 60 | V | 3 | ||
| Output Voltage (Recommended, family range) | VOUT | 3 | 5 | V | 3 | ||
| Operating Junction Temperature (Recommended) | TJ | -40 | 125 | °C | 3 | ||
| Input Capacitor (Recommended) | CIN | 1 | µF | 3 | |||
| Output Capacitor (Recommended) | COUT | 1 | 10 | µF | 3 | ||
| Output Current Limit (Maximum Output Current) | IOUT_MAX | 150 | mA | 4 | |||
| Current Limit | ILIMIT | 250 | mA | 4 | |||
| Thermal Shutdown Temperature | TOTSD | 150 | °C | 4 | |||
| Thermal Shutdown Hysteresis | THYOTSD | 30 | °C | 4 | |||
| Power Supply Rejection Ratio | PSRR | 70 | dB | VIN = 12V, IOUT = 1mA, VOUT = 3.3V @ 1kHz | 4 | ||
| Thermal Resistance Junction to Case, SOT89 (AP7387-XXY-13) | θJC | 97 | °C/W | 4 | |||
| Thermal Resistance Junction to Ambient, SOT89 (AP7387-XXY-13) | θJA | 165 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
AP7387-50Y-13 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files:
ap7387-50y-13-etched.step/ap7387-50y-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap7387-50y-13.step/ap7387-50y-13.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
ap7387-50y-13.step |
57 KB | You want the bare part, or you mark your own boards. |
ap7387-50y-13-etched.step |
1.8 MB | You want the part with AP7387-50Y-13 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 462 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (18 pp, sha256
8ba9ec885c56ce12, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).