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AP7383-50WW-7

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Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)ap7383-50ww-7factory-2.0.0extractor-text

Verified AP7383-50WW-7

by Ray · last 13 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

13 Nov 2026RayPublished by the parts factory: tier mfr, 5 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • •array (skip): not an array of element pairs
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AP7383-50WW-7 · SOT-25 · 5 pins
  • ✓copper: 5 copper pads, none touching another net
  • ✓datasheet: all 5 pin names found in the 13-page datasheet
  • ✓distributor: lcsc C5553327, digikey 31-AP7383-50WW-7TR-ND, mouser 621-AP7383-50WW-7
  • ✓family: SOT-23-5
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-us180gez/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.10)
  • ✓pads: 5 pins = 5 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 5 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 19 kB, viewers/symbol.html 8 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ap7383-50ww-7.kicad_sym✓ ap7383-50ww-7.kicad_mod✓ ap7383-50ww-7.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers ap7383-50ww-7: viewers rendered from the public page · Ray
ap7383-50ww-7-etched.glb ap7383-50ww-7: factory component page (tier=mfr) · Ray
ap7383-50ww-7-etched.step ap7383-50ww-7: factory component page (tier=mfr) · Ray
ap7383-50ww-7-hero.glb ap7383-50ww-7: hero GLB from the etched model (keeps the MPN mark) · Ray
ap7383-50ww-7-hero.overlay.json ap7383-50ww-7: hero GLB from the etched model (keeps the MPN mark) · Ray
ap7383-50ww-7.glb Publish 0.1.0 · Ray
ap7383-50ww-7.kicad_mod Publish 0.1.0 · Ray
ap7383-50ww-7.kicad_sym Publish 0.1.0 · Ray
ap7383-50ww-7.lbr Publish 0.1.0 · Ray
ap7383-50ww-7.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 5 pins · Ray

AP7383-50WW-7

Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-25

AP7383-50WW-7 from Diodes Incorporated, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.

Pinout

Pin Name Type Function
1 VIN power_in Input voltage pin, operating range 3.5V to 30V (absolute maximum 33V).
2 GND power_in Ground pin.
3 NC unconnected Not connected internally for the fixed version; recommended to connect to GND to maximize PCB copper for thermal dissipation.
4 NC unconnected Not connected internally for the fixed version; recommended to connect to GND to maximize PCB copper for thermal dissipation.
5 VOUT power_out Regulated output voltage pin, with 1µF output capacitor, up to 150mA output current.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-25
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Dropout Voltage VDROP 250 500 mV VOUT = 5.0V, IOUT = 50mA 4
Dropout Voltage VDROP 550 750 mV VOUT = 5.0V, IOUT = 100mA 4
Dropout Voltage VDROP 750 1100 mV VOUT = 5.0V, IOUT = 150mA 4
Input Voltage VIN 3.5 30 V 4
Current Limit ILIMIT 150 mA VIN = VOUT + 2V, VOUT1 = 98% × VOUT 4
Ground Current IGND 1.8 3 µA IOUT = 0A 4
EN High Voltage 2 V EN Input Voltage "High" 4
EN Low Voltage 0.4 V EN Input Voltage "Low" 4
Supply Input Voltage VIN 3.5 30 V 3
Operating Junction Temperature TJ -40 125 °C 3
Supply Input Voltage VIN 33 V @ TA = +25°C 3
Enable Input Voltage VEN 33 V @ TA = +25°C 3
Output Current IOUT 200 mA @ TA = +25°C 3
Lead Temperature TLEAD 260 °C Soldering, 10s 3
Operating Junction Temperature TJ 150 °C @ TA = +25°C 3
Power Dissipation PD 518 mW SOT25 (W5/WW Package) 3
Storage Temperature Range TSTG -65 150 °C 3
ESD (Machine Model) 250 V 3
ESD (Human Body Model) 2500 V 3
Thermal Resistance (Junction to Ambient) θJA 193 °C/W SOT25 (W5/WW Package) 3
Thermal Resistance (Junction to Case) θJC 68 °C/W SOT25 (W5/WW Package) 3
Line Regulation ΔVOUT/ΔVIN/VOUT 0.05 %/V VOUT + 2V ≤ VIN ≤ 30V, IOUT = 10mA 4
Load Regulation ΔVOUT/VOUT 0.5 % VIN = VOUT + 2V, 1mA ≤ IOUT ≤ 150mA 4
Standby Current ISTD 0.01 µA VEN in OFF Mode 4
Output Voltage Temperature Coefficient ΔVOUT/(VOUT×ΔT) 100 ppm/°C IOUT = 100µA, -40°C ≤ TJ ≤ +125°C (printed ±100) 4
EN Pin Current IEN 1 µA 4
Thermal Shutdown Temperature TOTSD 160 °C 4
Thermal Shutdown Hysteresis THYOTSD 20 °C 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing Abs , ESD (Human Body Model) 2500 V Note: 4. a). Stresses beyond those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only, and 3
contacts tin • Terminals: ▪ SOT25/SOT89: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 12

CAD (land: KiCad; 3D: generated from the datasheet)

  • Symbol: AP7383-50WW-7
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-25, generated on the KiCad land (body 1.6 x 2.8 mm, terminals on the pads, 1.1 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
  • 3D model files: ap7383-50ww-7-etched.step / ap7383-50ww-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap7383-50ww-7.step / ap7383-50ww-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (13 pp, sha256 ba4342c8e55d91d5, retrieved 2026-11-13, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).

Datasheet PDF