component

AP7380-33Y-13

Public Made by Adom

by adom

Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentpmicap7380-33y-13
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs ap7380-33y-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers ap7380-33y-13: one-pass backfill (courtyard 25.5 -> 22.62 mm2 (margin 0.25, default), hero rebuilt in-pass (inputs chan… · Ray
ap7380-33y-13-etched.fit.json ap7380-33y-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ap7380-33y-13-etched.glb ap7380-33y-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ap7380-33y-13-etched.step ap7380-33y-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ap7380-33y-13-hero.glb ap7380-33y-13: hero from the plain model · Ray
ap7380-33y-13-hero.overlay.json ap7380-33y-13: hero from the plain model · Ray
ap7380-33y-13.glb Publish 0.1.0 · Ray
ap7380-33y-13.kicad_mod ap7380-33y-13: one-pass backfill (courtyard 25.5 -> 22.62 mm2 (margin 0.25, default), hero rebuilt in-pass (inputs chan… · Ray
ap7380-33y-13.kicad_sym Publish 0.1.0 · Ray
ap7380-33y-13.lbr ap7380-33y-13: one-pass backfill (courtyard 25.5 -> 22.62 mm2 (margin 0.25, default), hero rebuilt in-pass (inputs chan… · Ray
ap7380-33y-13.step Publish 0.1.0 · Ray
package.json Publish 0.2.1 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Publish 0.2.1 · Ray
README.md ap7380-33y-13: specified limits as data (metadata.characteristics, 21 rows from the datasheet) · Ray

AP7380-33Y-13

Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

AP7380-33Y-13 from Diodes Incorporated, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Device ground reference. Common return for the input, output, and internal control circuitry. Connect directly to the system ground plane; on the SOT89 package the tab (pin 2) shares the die attach and is not brought out as a separate signal.
2 VIN power_in Regulator supply input. Accepts 3.5V to 24V (30V abs max). A 1.0µF ceramic bypass capacitor (CIN) from VIN to GND is recommended close to the pin. On SOT89 this is the large center/tab pin, which also provides the primary thermal path to the PCB copper.
3 VOUT power_out Regulated 3.3V output, 150mA max continuous (current-limited at ~150mA typ). Requires a 1.0µF ceramic COUT to GND for stability; the device is compatible with low-ESR ceramic capacitors. Output accuracy is ±1% of the nominal 3.3V setpoint.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-89-3
Category PMIC
Pins 3

Ordering variants

  • AP7380-33Y-13
  • AP7380-33Y-13W5-7
  • AP7380-33Y-13WR-7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VIN 3.5 24 V 4
Current Limit ILIMIT 150 mA VIN = VOUT + 2V, VOUT1 = 98% x VOUT 4
Dropout Voltage VDROP 360 580 mV 3.0V VOUT < 5.0V; IOUT = 50mA 4
Dropout Voltage VDROP 750 1000 mV 3.0V VOUT < 5.0V; IOUT = 100mA 4
Dropout Voltage VDROP 1050 1500 mV 3.0V VOUT < 5.0V; IOUT = 150mA 4
Ground Current IGND 1.8 3 µA IOUT = 0A 4
EN High Voltage 2 V 4
EN Low Voltage 0.4 V 4
Output Voltage Temperature Coefficient ∆VOUT/(VOUTx∆T) -100 100 ppm/°C IOUT = 100µA, -40°C ≤ TJ ≤ +125°C 4
Input Voltage Supply (recommended) VIN 3.5 24 V 3
Operating Junction Temperature (recommended) TJ -40 125 °C 3
Supply Input Voltage (absolute maximum) VIN 30 V 3
Enable Input Voltage (absolute maximum) VEN 30 V 3
Output Current (absolute maximum) IOUT 200 mA 3
Lead Temperature (absolute maximum) TLEAD 260 °C Soldering, 10sec 3
Operating Junction Temperature (absolute maximum) TJ 150 °C 3
Storage Temperature Range TSTG -65 150 °C 3
ESD (Human Body Model) 2500 V 3
ESD (Machine Model) 250 V 3
Thermal Resistance (Junction to Ambient), SOT89 (Option 2) θJA 118 °C/W 3
Thermal Resistance (Junction to Case), SOT89 (Option 2) θJC 20 °C/W 3

CAD (KiCad official)

  • Symbol: AP7380-33Y-13
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)
  • 3D model files: ap7380-33y-13-etched.step / ap7380-33y-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap7380-33y-13.step / ap7380-33y-13.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ap7380-33y-13.step 57 KB You want the bare part, or you mark your own boards.
ap7380-33y-13-etched.step 2.0 MB You want the part with AP7380-33Y-13 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 502 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (13 pp, sha256 02d548c7bf237a29, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF