component
AP7375Q-33W5-7
Public Made by Adomby adom
DIODES(美台) Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 18d ago |
| viewers | 18d ago |
| ap7375q-33w5-7-etched.glb | 18d ago |
| ap7375q-33w5-7-etched.step | 18d ago |
| ap7375q-33w5-7-hero.glb | 18d ago |
| ap7375q-33w5-7-hero.overlay.json | 18d ago |
| ap7375q-33w5-7.glb | 18d ago |
| ap7375q-33w5-7.kicad_mod | 18d ago |
| ap7375q-33w5-7.kicad_sym | 18d ago |
| ap7375q-33w5-7.lbr | 18d ago |
| ap7375q-33w5-7.step | 18d ago |
| package.json | 18d ago |
| page.json | 18d ago |
| README.md | 18d ago |
AP7375Q-33W5-7
DIODES(美台) · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-25
AP7375Q-33W5-7 from DIODES(美台), in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input voltage pin; the recommended supply range is 3.0V to 45V, with a 1µF ceramic input capacitor placed close to the device between VIN and GND. |
| 2 | GND | power_in | Ground pin, which should be connected to the external circuit ground through a wide trace or ground plane to reduce trace impedance. |
| 3 | EN | input | Enable pin: a level of 1V minimum enables the regulator and 0.4V maximum disables it, with an absolute maximum EN-to-GND rating of 55V. |
| 4 | NC | unconnected | Not connected internally; the datasheet recommends connecting this pin to GND to maximize PCB copper for thermal dissipation. |
| 5 | VOUT | power_out | Regulated 3.3V output for this 33 variant, which requires an output capacitor of at least 1µF (ceramic, X7R or X5R) placed as close as possible to VOUT and GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DIODES(美台) |
| Package | SOT-25 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Input Voltage | VIN | 3 | 45 | V | 4 | ||
| Output Current | IOUT_MAX | 300 | 350 | mA | 4 | ||
| Dropout Voltage | VDROP | 35 | 80 | mV | IOUT = 10mA, VIN = VOUTNOM, 0.1V | 4 | |
| Dropout Voltage | VDROP | 350 | 580 | mV | IOUT = 100mA, VIN = VOUTNOM, 0.1V | 4 | |
| Dropout Voltage | VDROP | 1200 | 1400 | mV | IOUT = 300mA, VIN = VOUTNOM, 0.1V, TA = +25°C | 4 | |
| Load Regulation | △VOUT(△IOUT) | 0.02 | 0.025 | %/mA | VIN = 12V, 1mA ≤ IOUT ≤ 100mA | 4 | |
| Line Regulation | △VOUT(∆VIN) | 0.01 | 0.02 | %/V | VOUTNOM + 2V ≤ VIN ≤ 45V, IOUT = 1mA | 4 | |
| Quiescent Current | IGND | 2.1 | 8 | µA | VIN = 12V, No load | 4 | |
| EN High Level | VENH | 1 | V | 4 | |||
| EN Low Level | VENL | 0.4 | V | 4 | |||
| Supply Input Voltage | VIN | 3 | 45 | V | 4 | ||
| Output Voltage | VOUT | 5 | V | 4 | |||
| Operating Junction Temperature | TJ | -40 | 125 | °C | 4 | ||
| Output Capacitor | COUT | 1 | 10 | µF | 4 | ||
| Supply Input Voltage | VIN | -0.3 | 55 | V | 3 | ||
| Regulated Output Voltage | VOUT | -0.3 | 6 | V | 3 | ||
| EN to GND | VEN | -0.3 | 55 | V | 3 | ||
| Lead Temperature | TLEAD | 260 | °C | Soldering, 10 sec | 3 | ||
| Operating Junction Temperature | TJ | 150 | °C | 3 | |||
| Operating Ambient Temperature | TA | -40 | 125 | °C | 3 | ||
| Storage Temperature Range | TSTG | -40 | 150 | °C | 3 | ||
| CDM ESD (Charge Device Model) | CDM | -1.5 | 1.5 | kV | Charge Device Model | 3 | |
| HBM ESD (Human Body Model) | HBM | -3 | 3 | kV | Human Body Model | 3 | |
| Input Capacitor | CIN | 1 | µF | 4 | |||
| Output Current Limit | ILIMIT | 500 | mA | 4 | |||
| Thermal Shutdown Temperature | TOTSD | 150 | °C | 4 | |||
| Thermal Shutdown Hysteresis | THYOTSD | 10 | °C | 4 | |||
| Power Supply Rejection Ratio | PSRR | 85 | dB | VIN = 12V, IOUT = 10mA, VOUT = 3.3V@1kHz | 4 | ||
| Output Noise Voltage | Vn | 120 | µVrms | BW = 10Hz to 100kHz, IOUT = 30mA | 4 | ||
| Thermal Resistance Junction to Ambient (SOT25) | θJA | 135.5 | °C/W | SOT25, JEDEC STD.51 High-K board (Note 4) | 3 | ||
| Thermal Resistance Junction to Case (SOT25) | θJC | 36.7 | °C/W | SOT25 (Note 4) | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | HBM ESD (Human Body Model) 3 kV Note: 4. a). Stresses greater than those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only, and | 3 | |
| contacts | tin | • Terminals: ▪ SOT89/ SO-8EP/ SOT25: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 17 |
CAD (KiCad official)
- Symbol:
AP7375Q-33W5-7 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-25 (KiCad packages3D, STEP)
- 3D model files:
ap7375q-33w5-7-etched.step/ap7375q-33w5-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap7375q-33w5-7.step/ap7375q-33w5-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: DIODES(美台) datasheet (18 pp, sha256
c298cf9459111ab2, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).