component
AP7375-33W5-7
Public Made by Adomby adom
Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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AP7375-33W5-7
Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-25
AP7375-33W5-7 from Diodes Incorporated, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input voltage; the datasheet gives a supply input range of 3.0V to 45V, with a 1µF input capacitor recommended between VIN and GND. |
| 2 | GND | power_in | Ground; the regulator ground should be connected to the external circuit ground to reduce voltage drop from trace impedance. |
| 3 | EN | input | Enable input; a high level of 1V minimum enables the LDO output and a low level of 0.4V maximum disables it, with the EN pin rated to 55V absolute maximum to GND. |
| 4 | NC | unconnected | Not connected internally; the datasheet recommends connecting this pin to GND to maximize PCB copper for thermal dissipation. |
| 5 | VOUT | power_out | Regulated output voltage (3.3V for the -33 version); the output requires a minimum 1µF ceramic capacitor to GND for stability and must be kept within the 6V absolute maximum rating. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-25 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 3 | 45 | V | 4 | ||
| Quiescent Current | IGND | 2.1 | 5 | µA | VIN = 12V, No Load | 4 | |
| Output Current | IOUT_MAX | 300 | 350 | mA | 4 | ||
| Dropout Voltage | VDROP | 35 | 50 | mV | IOUT = 10mA, VIN = VOUTNOM, 0.1V | 4 | |
| Dropout Voltage | VDROP | 350 | 360 | mV | IOUT = 100mA, VIN = VOUTNOM, 0.1V | 4 | |
| Load Regulation | △VOUT(△IOUT) | 0.02 | 0.025 | %/mA | VIN = 12V, 1mA ≤ IOUT ≤ 100mA | 4 | |
| Line Regulation | △VOUT(∆VIN) | 0.01 | 0.02 | %/V | VOUTNOM + 0.5 V ≤ VIN ≤ 45V, IOUT = 1mA | 4 | |
| EN High Level | VENH | 1 | V | Enabled | 4 | ||
| EN Low Level | VENL | 0.4 | V | Disabled | 4 | ||
| Supply Input Voltage (recommended) | VIN | 3 | 45 | V | 4 | ||
| Output Voltage (recommended) | VOUT | 5 | V | 4 | |||
| Operating Junction Temperature (recommended) | TJ | -40 | 125 | °C | 4 | ||
| Output Capacitor | COUT | 1 | 10 | µF | 4 | ||
| Input Capacitor | CIN | 1 | µF | 4 | |||
| Supply Input Voltage (absolute max) | VIN | -0.3 | 55 | V | 3 | ||
| Regulated Output Voltage (absolute max) | VOUT | -0.3 | 6 | V | 3 | ||
| VOUT to VIN | -55 | 0.3 | V | 3 | |||
| EN to GND | VEN | -0.3 | 55 | V | 3 | ||
| Lead Temperature | TLEAD | 260 | ºC | Soldering, 10sec | 3 | ||
| Operating Junction Temperature (absolute max) | TJ | 150 | ºC | 3 | |||
| Operating Ambient Temperature | TA | -40 | 85 | ºC | 3 | ||
| Storage Temperature Range | TSTG | -40 | 150 | ºC | 3 | ||
| CDM ESD (Change Device Model) | CDM | 1.5 | kV | Printed as '1.5V kV' | 3 | ||
| HBM ESD (Human Body Model) | HBM | 4 | kV | Printed as '4V kV' | 3 | ||
| Thermal Resistance Junction to Ambient, SOT25 | θJA | 153 | °C/W | SOT25 package; JEDEC STD.51 High-K board | 3 | ||
| Thermal Resistance Junction to Case, SOT25 | θJC | 54 | °C/W | SOT25 package | 4 | ||
| Current Limit | ILIMIT | 500 | mA | 4 | |||
| Thermal Shutdown Temperature | TOTSD | 150 | °C | 4 | |||
| Thermal Shutdown Hysteresis | THYOTSD | 20 | °C | 4 | |||
| Power Supply Rejection Ratio | PSRR | 85 | dB | VIN = 12V, IOUT = 10mA, VOUT = 3.3V @ 1kHz | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | HBM ESD (Human Body Model) 4V kV Note: 4. a). Stresses greater than those listed under “Absolute Maximum Ratings” can cause permanent damage to the device. These are stress ratings only, and | 3 | |
| contacts | tin | • Terminals: ▪ SOT23/SOT25/SOT89: Finish - Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 17 |
CAD (KiCad official)
- Symbol:
AP7375-33W5-7 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-25 (KiCad packages3D, STEP)
- 3D model files:
ap7375-33w5-7-etched.step/ap7375-33w5-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap7375-33w5-7.step/ap7375-33w5-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (18 pp, sha256
f0ba34bc142f9c90, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).