component
AP7366EA-18W5-7
Public Made by Adomby adom
Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownAP7366EA-18W5-7
Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-25
AP7366EA-18W5-7 from Diodes Incorporated, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Voltage input pin, recommended operating input range 2.2V to 6V; bypass to ground through at least 1µF MLCC capacitor. |
| 2 | GND | power_in | Ground pin. |
| 3 | EN | input | Active-high enable input; the device turns on when EN is driven above VIH (min 1.0V) and off when below VIL (max 0.3V), and the EN pin should be tied to IN if the feature is not used. |
| 4 | NC | unconnected | No internal connection; leaving this pin floating does not affect chip functionality. |
| 5 | OUT | power_out | Regulated voltage output pin (1.8V fixed for this variant), up to 600mA; bypass to ground through 1µF MLCC capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-25 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage (absolute maximum) | VIN | 6.5 | V | TA = +25°C | 3 | ||
| ESD Human Body Model | ESD HBM | 2000 | V | 3 | |||
| ESD Charge Device Model | ESD CDM | -1000 | 1000 | V | 3 | ||
| Storage Temperature Range | TST | -65 | 150 | °C | 3 | ||
| Maximum Junction Temperature | TJ | 150 | °C | 3 | |||
| Input Voltage (recommended) | VIN | 2.2 | 6 | V | TA = +25°C | 3 | |
| Output Voltage (recommended) | VOUT | 0.8 | 5 | V | TA = +25°C | 3 | |
| Output Current (recommended) | IOUT | 0 | 600 | mA | Note 4 | 3 | |
| Operating Ambient Temperature | TA | -40 | 85 | °C | 3 | ||
| Input Quiescent Current | IQ | 60 | 80 | μA | VEN = VIN, IOUT = 0mA | 4 | |
| Input Shutdown Current | ISHDN | -1 | 0.05 | 1 | μA | VEN = 0V, IOUT = 0mA | 4 |
| Line Regulation | VOUT/VIN/VOUT | 0.01 | 0.1 | %/V | VIN = (VOUT +1V) to 5.5V, IOUT = 10mA, TA = +25°C | 4 | |
| Line Regulation | VOUT/VIN/VOUT | 0.2 | %/V | VIN = (VOUT +1V) to 5.5V, IOUT = 10mA, -40°C ≤ TA ≤ +85°C | 4 | ||
| Load Regulation (1.2V < VOUT ≤ 3.9V) | VOUT/VOUT | -1 | 1 | % | IOUT = 1mA to 600mA | 4 | |
| Dropout Voltage | VDROPOUT | 160 | 250 | mV | VOUT = 1.8V, IOUT = 300mA | 4 | |
| Dropout Voltage | VDROPOUT | 320 | 420 | mV | VOUT = 1.8V, IOUT = 600mA | 4 | |
| Output Voltage Temperature Coefficient | VOUT/TA/VOUT | -100 | 100 | ppm/°C | IOUT = 100mA, -40°C ≤ TA ≤ +85°C | 5 | |
| Current Limit | ILIMIT | 0.66 | 1 | A | VIN = VOUT + 1V | 4 | |
| EN Input Logic Low Voltage | VIL | 0.3 | V | VIN = VIN-Min to VIN-Max | 4 | ||
| EN Input Logic High Voltage | VIH | 1 | V | VIN = VIN-Min to VIN-Max | 4 | ||
| EN Input Leakage Current | IEN | -0.1 | 0.1 | μA | VIN = 5.5V or VEN = 0V | 4 | |
| EN Pull-Down Resistor | RENPD | 3 | MΩ | 5 | |||
| Junction-to-Ambient Thermal Resistance (SOT25) | θJA | 139 | °C/W | SOT25, Note 7 (JEDEC High-K board, TA = +25°C) | 5 | ||
| Junction-to-Case Thermal Resistance (SOT25) | θJC | 38.8 | °C/W | SOT25, Note 7 | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | reduce noise. For PCB layout, a wide copper trace is required for both IN and GND pins. A lower ESR capacitor type allows the use of less | 10 |
CAD (KiCad official)
- Symbol:
AP7366EA-18W5-7 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-25 (KiCad packages3D, STEP)
- 3D model files:
ap7366ea-18w5-7-etched.step/ap7366ea-18w5-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap7366ea-18w5-7.step/ap7366ea-18w5-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (17 pp, sha256
cff0b035865f030d, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).