component
AP7365-08WG-7
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Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownAP7365-08WG-7
Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-25
AP7365-08WG-7 from Diodes Incorporated, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Voltage input pin, to be bypassed to ground with at least a 1µF MLCC capacitor; the recommended input voltage range is 2V to 6V. |
| 2 | GND | power_in | Ground pin. |
| 3 | EN | input | Active-high enable input; the logic-low threshold is at most 0.4V and the logic-high threshold is at least 1.4V, and the EN pin should be tied to IN if the feature is not used. |
| 4 | NC | unconnected | No connection on the fixed-output SOT25 package (pin 4 is the ADJ feedback pin only on the adjustable version). |
| 5 | OUT | power_out | Regulated voltage output pin, to be bypassed to ground through a 1µF MLCC capacitor with ESR greater than 15mΩ for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-25 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage Accuracy | VOUT | -2 | 2 | % | TA = -40°C to +85°C, IOUT = 10% of IOUT-Max | 3 | |
| Load Regulation | VOUT/VOUT | -1 | 1 | % | VIN = (VOUT +1V) to VIN-Max, IOUT = 1mA to 600mA | 3 | |
| Line Regulation | VOUT/VIN/V | 0.02 | 0.2 | %/V | VIN = (VOUT +1V) to VIN-Max, VEN = VIN, IOUT = 1mA | 3 | |
| Dropout Voltage (VOUT < 2.5V) | VDROPOUT | 370 | 600 | mV | VOUT < 2.5V, IOUT = 600mA | 3 | |
| Input Quiescent Current | IQ | 35 | 80 | μA | VEN = VIN, IOUT = 0mA | 3 | |
| Input Shutdown Current | ISHDN | 0.1 | 1 | μA | VEN = 0V, IOUT = 0mA | 3 | |
| Input Leakage Current | ILEAK | 0.1 | 1 | μA | VEN = 0V, OUT grounded | 3 | |
| Current Limit | ILIMIT | 0.8 | 1.4 | A | VIN = VIN-Min to VIN-Max, VOUT/ROUT = 2.5A | 3 | |
| EN Input Logic Low Voltage | VIL | 0.4 | V | VIN = VIN-Min to VIN-Max | 3 | ||
| EN Input Logic High Voltage | VIH | 1.4 | V | VIN = VIN-Min to VIN-Max | 3 | ||
| EN Input Current | IEN | -1 | 1 | μA | VIN = 0V or VIN-Max | 3 | |
| Input Voltage (recommended) | VIN | 2 | 6 | V | 3 | ||
| Output Current (recommended) | IOUT | 0 | 600 | mA | Note 4: device maintains a stable regulated output without load current | 3 | |
| Operating Ambient Temperature | TA | -40 | 85 | °C | 3 | ||
| Input Voltage (absolute maximum) | VIN | 6.5 | V | 3 | |||
| ESD HBM Protection | ESD HBM | 2000 | V | Human Body Model | 3 | ||
| ESD MM Protection | ESD MM | 200 | V | Machine Model | 3 | ||
| Storage Temperature Range | TST | -65 | 150 | °C | 3 | ||
| Maximum Junction Temperature | TJ | 150 | °C | 3 | |||
| Short-Circuit Current | ISHORT | 240 | mA | VIN = VIN-Min to VIN-Max, VOUT < 0.2V (fixed version) or 25% of VOUT (ADJ version) | 3 | ||
| Start-Up Time | tST | 200 | μs | VEN = 0V to 2.0V in 1μs, IOUT = 600mA | 3 | ||
| PSRR | PSRR | 65 | dB | VIN = [VOUT +1V] VDC + 0.5VppAC, f = 1kHz, IOUT = 50mA | 3 | ||
| Thermal Shutdown Threshold | TSHDN | 145 | °C | 3 | |||
| Thermal Shutdown Hysteresis | THYS | 15 | °C | 3 | |||
| Thermal Resistance Junction-to-Ambient (SOT25) | JA | 169 | °C/W | Note 7: device mounted on FR-4 PCB, 1oz copper, minimum recommended pad layout | 4 | ||
| Thermal Resistance Junction-to-Case (SOT25) | JC | 31 | °C/W | Note 7: device mounted on FR-4 PCB, 1oz copper, minimum recommended pad layout | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | reduce noise. For PCB layout, a wide copper trace is required for both IN and GND pins. A lower ESR capacitor type allows the use of less | 8 |
CAD (KiCad official)
- Symbol:
AP7365-08WG-7 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-25 (KiCad packages3D, STEP)
- 3D model files:
ap7365-08wg-7-etched.step/ap7365-08wg-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap7365-08wg-7.step/ap7365-08wg-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (18 pp, sha256
7ec2b65a0dbeaec0, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).