# AP7361C-25ER-13

**Diodes Incorporated** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223R

AP7361C-25ER-13 from Diodes Incorporated, in a SOT-223R. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the regulator. |
| 2 | OUT | power_out | The regulator output; bypass to ground with at least a 2.2µF ceramic capacitor, and a larger capacitor is recommended for improved AC load response. |
| 3 | IN | power_in | The regulator input; bypass to ground with at least a 1µF ceramic capacitor. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-223R |
| Category | Power Management (PMIC) |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage (recommended) | VIN | 2.2 |  | 6 | V | TA = +25°C, unless otherwise specified | 4 |
| Output Voltage (recommended, adjustable range) | VOUT | 0.8 |  | 5 | V | TA = +25°C, unless otherwise specified | 4 |
| Output Current (recommended) | IOUT | 0 |  | 1 | A | TA = +25°C, unless otherwise specified; Note 6 | 4 |
| Operating Ambient Temperature | TA | -40 |  | 85 | °C | TA = +25°C, unless otherwise specified | 4 |
| Input Voltage (absolute maximum) | VIN |  |  | 6.5 | V | TA = +25°C, unless otherwise specified | 4 |
| Operating Junction Temperature Range | TJ | -40 |  | 150 | °C | TA = +25°C, unless otherwise specified | 4 |
| Storage Temperature Range | TSTG | -65 |  | 150 | °C | TA = +25°C, unless otherwise specified | 4 |
| Power Dissipation (SOT223) | PD |  |  | 1100 | mW | SOT223 package | 4 |
| Output Voltage Accuracy (±1%, all fixed options incl. 2.5V) | VOUT | -1 |  | 1 | % |  | 1 |
| Input Quiescent Current | IQ |  | 60 | 80 | µA | Enabled, IOUT = 0A | 5 |
| Input Shutdown Current | ISHDN | -1 | 0.05 | 1 | µA | VEN = 0V, IOUT = 0A | 5 |
| Line Regulation (TA = +25°C) | ΔVOUT/ΔVIN × VIN/VOUT |  | 0.01 | 0.1 | %/V | VIN = VOUT +1V to 5.5V, IOUT = 100mA, TA = +25°C | 5 |
| Line Regulation (-40°C to +85°C) | ΔVOUT/ΔVIN × VIN/VOUT |  |  | 0.2 | %/V | VIN = VOUT +1V to 5.5V, IOUT = 100mA, -40°C ≤ TA ≤ +85°C | 5 |
| Load Regulation | ΔVOUT / VOUT | -1 |  | 1 | % | IOUT from 1.0mA to 1A, 1.2V<VOUT≤3.3V | 5 |
| Dropout Voltage (300mA) | VDROPOUT |  | 200 | 250 | mV | IOUT = 300mA, 1.5V≤VOUT<2.6V | 5 |
| EN Input Logic Low Voltage | VIL | 0 |  | 0.3 | V |  | 5 |
| EN Input Logic High Voltage | VIH | 1 |  |  | V |  | 5 |
| EN Input Leakage Current | IEN | -0.1 |  | 0.1 | µA | VIN = 5.5V, VEN = 0V | 5 |
| Maximum Output Current | IOUT | 1 |  |  | A | VIN = VOUT +1V | 5 |
| Current Limit | ILIMIT | 1.1 | 1.5 |  | A | VIN = VOUT +1V (VIN MINI=2.2V) | 5 |
| Output Voltage Temperature Coefficient |  | -100 |  | 100 | ppm/°C | IOUT = 100mA, -40°C ≤ TA ≤ +85°C | 5 |
| Dropout Voltage (1A) | VDROPOUT |  | 440 |  | mV | IOUT = 1A, 2.0V≤VOUT<2.6V | 5 |
| EN Pull-Down Resistor | RENPD |  | 3 |  | MΩ |  | 5 |
| Output Discharge Resistor | RPD |  | 100 |  | Ω | VOL = 1V | 5 |
| Short-Circuit Current | ISHORT |  | 400 |  | mA | VIN = VOUT +1V, Output Voltage < 15% VOUT | 5 |
| Power Supply Rejection Ratio (1kHz) | PSRR |  | 75 |  | dB | f = 1kHz, IOUT = 100mA | 5 |
| Power Supply Rejection Ratio (10kHz) | PSRR |  | 55 |  | dB | f = 10kHz, IOUT = 100mA | 5 |
| Start-Up Time | tST |  | 150 |  | µs | VOUT = 3V, COUT = 2.2µF, RL = 30Ω | 5 |
| Thermal Shutdown Threshold | TSHDN |  | 150 |  | °C |  | 5 |
| Thermal Shutdown Hysteresis | THYS |  | 20 |  | °C |  | 5 |
| Thermal Resistance Junction-to-Ambient (SOT223) | θJA |  | 110 |  | °C/W | Note 9: FR-4 PCB with minimum recommended pad layout | 6 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin | Finish - Matte Tin Plated Leads, Solderable per MIL-STD￾202, Method 208  U-DFN3030-8: | 1 |

## CAD (KiCad official)

- Symbol: `AP7361C-25ER-13`
- Footprint: `Package_TO_SOT_SMD:SOT-223-3_TabPin2`
- 3D model: SOT-223R (KiCad packages3D, STEP)
- 3D model files: `ap7361c-25er-13-etched.step` / `ap7361c-25er-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ap7361c-25er-13.step` / `ap7361c-25er-13.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8560093488244695040) (22 pp, sha256 `9b64f49c5975b2ba`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ap7361c-25er-13-datasheet.pdf)