AP7361-33E-13
Public Made by Adomby adom
Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
AP7361-33E-13
Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223
AP7361-33E-13 from Diodes Incorporated, in a SOT-223. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | The input of the regulator, specified for 2.2V to 6.0V operation with a 6.5V absolute maximum; bypass to ground with at least 1µF ceramic capacitor. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | OUT | power_out | The regulator output; bypass to ground with at least 2.2µF ceramic capacitor (10mΩ to 300mΩ ESR), with a larger capacitor recommended for improved AC load response. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-223 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Quiescent Current | IQ | 70 | 90 | µA | Enabled, IOUT = 0A | 5 | |
| Output Voltage Accuracy | VOUT | -1 | 1 | % | IOUT = 100mA, TA = +25°C | 5 | |
| Output Voltage Accuracy | VOUT | -2 | 2 | % | IOUT = 100mA, -40°C ≤ TA ≤ +85°C | 5 | |
| Output Voltage Accuracy | VOUT | -3 | 0.5 | 3 | % | Over VIN, IOUT, and TA | 5 |
| Line Regulation | ΔVOUT/ΔVIN | 0.01 | 0.1 | %/V | VIN = VOUT +1V to 6V, IOUT = 100mA, TA = +25°C | 5 | |
| Line Regulation | ΔVOUT/ΔVIN | 0.2 | %/V | -40°C ≤TA ≤ +85°C | 5 | ||
| Load Regulation | ΔVOUT/VOUT | -1 | 0.5 | 1 | % | IOUT from 1mA to 300mA | 5 |
| Dropout Voltage | VDROPOUT | 150 | 200 | mV | IOUT = 300mA | 5 | |
| Dropout Voltage | VDROPOUT | 250 | 350 | mV | IOUT = 500mA | 5 | |
| Dropout Voltage | VDROPOUT | 500 | 700 | mV | IOUT = 1A | 5 | |
| Current Limit | ILIMIT | 1.1 | 1.5 | A | VIN = VOUT +1V | 5 | |
| Power Supply Rejection Ratio | PSRR | 60 | 65 | dB | f = 1KHz, IOUT = 100mA | 5 | |
| Output Voltage Temperature Coefficient | ΔVOUT/(ΔTA·VOUT) | -130 | 130 | ppm/°C | IOUT = 100mA, -40°C ≤ TA ≤ +85°C | 5 | |
| Input Voltage | VIN | 2.2 | 6 | V | 4 | ||
| Output Current | IOUT | 0 | 1 | A | Note 6: stable regulated output without load; limited by package power dissipation | 4 | |
| Operating Ambient Temperature | TA | -40 | 85 | °C | 4 | ||
| Input Voltage | VIN | 6.5 | V | 4 | |||
| Operating Junction Temperature Range | TJ | -40 | 150 | °C | 4 | ||
| Storage Temperature Range | TST | -65 | 150 | °C | 4 | ||
| Power Dissipation | PD | 1100 | mW | SOT223, TA = +25°C (Note 4) | 4 | ||
| ESD Protection Human Body Model | ESD HBM | 2 | KV | Human Body Model, printed as > 2 KV | 4 | ||
| ESD Protection Machine Model | ESD MM | 200 | V | Machine Model (Note 5), printed as > 200 V | 4 | ||
| Thermal Resistance Junction-to-Ambient | θJA | 110 | °C/W | SOT223 (Note 9): FR-4 PCB, minimum recommended pad layout | 5 | ||
| Thermal Shutdown Threshold | TSHDN | 150 | °C | 5 | |||
| Thermal Shutdown Hysteresis | THYS | 20 | °C | 5 | |||
| Short-Circuit Current | ISHORT | 200 | mA | VIN = VOUT +1V, Output Voltage < 15% VOUT | 5 | ||
| Power Supply Rejection Ratio | PSRR | 45 | dB | f = 10KHz, IOUT = 100mA | 5 | ||
| Start-Up Time | tST | 200 | µs | VOUT = 3V, COUT = 1µF, RL = 30Ω | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | reduce noise. For PCB layout, a wide copper trace is required for both IN and GND pins. A lower ESR capacitor type allows the use of less | 12 |
CAD (KiCad official)
- Symbol:
AP7361-33E-13 - Footprint:
Package_TO_SOT_SMD:SOT-223-3_TabPin2 - 3D model: SOT-223 (KiCad packages3D, STEP)
- 3D model files:
ap7361-33e-13-etched.step/ap7361-33e-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap7361-33e-13.step/ap7361-33e-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (22 pp, sha256
fd84e397b31647d7, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AP7361-33E-13
**Diodes Incorporated** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223
AP7361-33E-13 from Diodes Incorporated, in a SOT-223. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | The input of the regulator, specified for 2.2V to 6.0V operation with a 6.5V absolute maximum; bypass to ground with at least 1µF ceramic capacitor. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | OUT | power_out | The regulator output; bypass to ground with at least 2.2µF ceramic capacitor (10mΩ to 300mΩ ESR), with a larger capacitor recommended for improved AC load response. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-223 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Quiescent Current | IQ | | 70 | 90 | µA | Enabled, IOUT = 0A | 5 |
| Output Voltage Accuracy | VOUT | -1 | | 1 | % | IOUT = 100mA, TA = +25°C | 5 |
| Output Voltage Accuracy | VOUT | -2 | | 2 | % | IOUT = 100mA, -40°C ≤ TA ≤ +85°C | 5 |
| Output Voltage Accuracy | VOUT | -3 | 0.5 | 3 | % | Over VIN, IOUT, and TA | 5 |
| Line Regulation | ΔVOUT/ΔVIN | | 0.01 | 0.1 | %/V | VIN = VOUT +1V to 6V, IOUT = 100mA, TA = +25°C | 5 |
| Line Regulation | ΔVOUT/ΔVIN | | | 0.2 | %/V | -40°C ≤TA ≤ +85°C | 5 |
| Load Regulation | ΔVOUT/VOUT | -1 | 0.5 | 1 | % | IOUT from 1mA to 300mA | 5 |
| Dropout Voltage | VDROPOUT | | 150 | 200 | mV | IOUT = 300mA | 5 |
| Dropout Voltage | VDROPOUT | | 250 | 350 | mV | IOUT = 500mA | 5 |
| Dropout Voltage | VDROPOUT | | 500 | 700 | mV | IOUT = 1A | 5 |
| Current Limit | ILIMIT | | 1.1 | 1.5 | A | VIN = VOUT +1V | 5 |
| Power Supply Rejection Ratio | PSRR | | 60 | 65 | dB | f = 1KHz, IOUT = 100mA | 5 |
| Output Voltage Temperature Coefficient | ΔVOUT/(ΔTA·VOUT) | -130 | | 130 | ppm/°C | IOUT = 100mA, -40°C ≤ TA ≤ +85°C | 5 |
| Input Voltage | VIN | 2.2 | | 6 | V | | 4 |
| Output Current | IOUT | 0 | | 1 | A | Note 6: stable regulated output without load; limited by package power dissipation | 4 |
| Operating Ambient Temperature | TA | -40 | | 85 | °C | | 4 |
| Input Voltage | VIN | | | 6.5 | V | | 4 |
| Operating Junction Temperature Range | TJ | -40 | | 150 | °C | | 4 |
| Storage Temperature Range | TST | -65 | | 150 | °C | | 4 |
| Power Dissipation | PD | | | 1100 | mW | SOT223, TA = +25°C (Note 4) | 4 |
| ESD Protection Human Body Model | ESD HBM | 2 | | | KV | Human Body Model, printed as > 2 KV | 4 |
| ESD Protection Machine Model | ESD MM | 200 | | | V | Machine Model (Note 5), printed as > 200 V | 4 |
| Thermal Resistance Junction-to-Ambient | θJA | | 110 | | °C/W | SOT223 (Note 9): FR-4 PCB, minimum recommended pad layout | 5 |
| Thermal Shutdown Threshold | TSHDN | | 150 | | °C | | 5 |
| Thermal Shutdown Hysteresis | THYS | | 20 | | °C | | 5 |
| Short-Circuit Current | ISHORT | | 200 | | mA | VIN = VOUT +1V, Output Voltage < 15% VOUT | 5 |
| Power Supply Rejection Ratio | PSRR | | 45 | | dB | f = 10KHz, IOUT = 100mA | 5 |
| Start-Up Time | tST | | 200 | | µs | VOUT = 3V, COUT = 1µF, RL = 30Ω | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | reduce noise. For PCB layout, a wide copper trace is required for both IN and GND pins. A lower ESR capacitor type allows the use of less | 12 |
## CAD (KiCad official)
- Symbol: `AP7361-33E-13`
- Footprint: `Package_TO_SOT_SMD:SOT-223-3_TabPin2`
- 3D model: SOT-223 (KiCad packages3D, STEP)
- 3D model files: `ap7361-33e-13-etched.step` / `ap7361-33e-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ap7361-33e-13.step` / `ap7361-33e-13.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586199241043271680) (22 pp, sha256 `fd84e397b31647d7`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ap7361-33e-13-datasheet.pdf)