component
AP7354D-15W5-7
Public Made by Adomby adom
Diodes Incorporated Linear Voltage Regulators (LDO), SOT-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownAP7354D-15W5-7
Diodes Incorporated · Linear Voltage Regulators (LDO) · SOT-25
AP7354D-15W5-7 from Diodes Incorporated, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input with a 2.0V to 5.5V recommended operating range and a 6.0V absolute maximum; a minimum 0.1µF ceramic capacitor is recommended between VIN and GND. |
| 2 | GND | power_in | Ground pin that must be connected to the external circuit ground, since the chip ground must be routed through this pin. |
| 3 | EN | input | Chip enable that must be driven high or low and must not be floating; driving it high enables the output and pulling it low places the regulator in shutdown, with a VIH of at least 1.0V, a VIL of at most 0.4V and a 6.0V absolute maximum. |
| 4 | NC | unconnected | No connection; this pin is labelled NC in the pin assignment figure but is not listed in the pin description table. |
| 5 | VOUT | power_out | Regulated output voltage, rated at -0.3V to VIN+0.3V relative to GND, with active output discharge provided on the D (with discharge) variant. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-25 |
| Category | Power Management |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | 2 | 5.5 | V | TA = -40°C to +85°C | 4 | ||
| Input Voltage | VIN | 2 | 5.5 | V | 3 | ||
| Output Voltage Accuracy | -40 | 40 | mV | VOUT ≤ 2.0V, IOUT = 1mA, TA = +25°C | 4 | ||
| Output Voltage Accuracy | -80 | 80 | mV | VOUT ≤ 2.0V, IOUT = 1mA, TA = -40°C to +85°C | 4 | ||
| Line Regulation (∆VOUT/∆VIN/VOUT) | 0.02 | 0.1 | %/V | MAX (VOUT + 1.0V, 2.5V) ≤ VIN ≤ 5.5V | 4 | ||
| Load Regulation (∆VOUT) | -40 | 40 | mV | 1mA ≤ IOUT ≤ 150mA | 4 | ||
| Output Current | 150 | mA | 4 | ||||
| Quiescent Current | 0.25 | 0.6 | µA | IOUT = 0mA | 4 | ||
| Standby Current | ISTANDBY | 0.02 | 0.2 | µA | Set EN Low, No Load | 4 | |
| Dropout Voltage (VOUT = 1.5V) | 0.43 | 0.75 | V | IOUT = 150mA; VOUT = 1.5V | 4 | ||
| EN Input Low Voltage | 0.4 | V | 4 | ||||
| EN Input High Voltage | 1 | 5.5 | V | 4 | |||
| ESD HBM Human Body Model ESD Protection | ESD HBM | 4 | kV | 3 | |||
| ESD MM Machine Model ESD Protection | ESD MM | 400 | V | 3 | |||
| Input Voltage | VIN | 6 | V | 3 | |||
| Input Voltage at EN Pin | VEN | 6 | V | 3 | |||
| Output Voltage to GND | VOUT | -0.3 | V | -0.3 to VIN +0.3 V; upper limit printed as VIN +0.3 | 3 | ||
| Operating Ambient Temperature | TA | -40 | 85 | °C | 3 | ||
| Maximum Junction Temperature | TJ | 125 | °C | 3 | |||
| Storage Temperature | TSTG | -55 | 125 | °C | 3 | ||
| Power Dissipation | PD | 315 | mW | Note 6: based on TA = +40°C; derate 3.75mW per °C above +40°C | 3 | ||
| Output Current | IOUT | 0 | 150 | mA | 3 | ||
| Operating Ambient Temperature | TA | -40 | 85 | °C | 3 | ||
| Short Circuit Current Limit | 60 | mA | VOUT = 0V | 4 | |||
| Thermal Resistance Junction-to-Ambient (SOT25) | θJA | 162 | °C/W | Note 11: 1in x 1in FR-4 PCB, 2oz copper, minimum recommended pad layout | 4 | ||
| Thermal Resistance Junction-to-Case (SOT25) | θJC | 38 | °C/W | Note 11: 1in x 1in FR-4 PCB, 2oz copper, minimum recommended pad layout | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: SOT23/SOT25: Finish - Mate Tin Plated Leads, Solderable | 1 |
CAD (land: KiCad; 3D: generated from the datasheet)
- Symbol:
AP7354D-15W5-7 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-25, generated on the KiCad land (body 1.6 x 3 mm, terminals on the pads, 1.1 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
- 3D model files:
ap7354d-15w5-7-etched.step/ap7354d-15w5-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap7354d-15w5-7.step/ap7354d-15w5-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (18 pp, sha256
3d9ef71ba1cf3e6f, retrieved 2026-11-13, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).