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AP7330D-W5-7

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Diodes Incorporated Linear Voltage Regulators (LDO), SOT-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AP7330D-W5-7

Diodes Incorporated · Linear Voltage Regulators (LDO) · SOT-25

AP7330D-W5-7 from Diodes Incorporated, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Power input pin; the datasheet gives an input voltage range of 1.8V to 5.5V with a 6.0V absolute maximum.
2 GND power_in Ground reference pin that should connect to the external circuit ground through a wide, low-impedance trace.
3 EN input Enable pin that must be driven high or low and must not float; EN input high is 1.4V to 5.5V and low is 0V to 0.5V, with 6.0V absolute maximum.
4 ADJ input Output feedback pin connected to an external resistor divider to set VOUT from 1.0V to 4.5V against the 0.8V internal reference, with ADJ leakage current of 1µA maximum.
5 VOUT power_out Power output pin that guarantees 300mA output current with an output voltage range of 1.0V to 4.5V.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-25
Category Power Supply Chip
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VIN 1.8 5.5 V 3
Output Voltage VOUT 1 4.5 V 3
Output Current IOUT 0 300 mA 3
Operating Ambient Temperature TA -40 85 °C 3
Input Voltage VIN 6 V 2
Input Voltage for EN Pin VEN 6 V 2
Output Voltage VOUT -0.3 V Upper limit printed as VIN + 0.3 2
Output Current IOUT 300 mA 2
Power Dissipation PD 300 mW 2
Storage Temperature TSTG -55 125 °C 2
ESD HBM Human Body Model ESD Protection ESD HBM 2 kV Printed as > 2 kV 2
ESD MM Machine Model ESD Protection ESD MM 200 V Printed as > 200 V 2
Output Voltage Accuracy 0.99 1.01 V VIN = VOUT(T)+1V, TA = +25°C; printed as multiples of VOUT(T) (Note 11) 3
VADJ Reference Voltage VADJ 0.792 0.8 0.808 V VIN = VOUT +1V, 1mA ≤ IOUT ≤ 300mA 3
Input Voltage VIN 1.8 5.5 V TA = -40°C to +85°C 3
Line Regulation (dVOUT/dVIN/VOUT) 0.02 0.1 %/V VIN = (VOUT, Nom +1.0V) to 5.5V, IOUT = 1.0mA 3
Load Regulation 15 30 mV VIN = VOUT - Nom +1.0V, IOUT = 1mA to 300mA 3
ADJ Leakage Current 0.1 1 µA 3
Quiescent Current 45 78 µA IOUT = 0mA 3
ISTANDBY ISTANDBY 0.01 1 µA VEN = 0V (Disabled) 3
Output Current 300 mA 3
Dropout Voltage 0.67 0.89 V IOUT = 300mA (SOT25), 1.0V ≤ VOUT ≤ 1.2V 3
Dropout Voltage 0.57 0.7 V IOUT = 300mA (SOT25), 1.2V < VOUT ≤ 1.4V 3
Dropout Voltage 0.5 0.63 V IOUT = 300mA (SOT25), 1.4V < VOUT ≤ 1.7V 3
Dropout Voltage 0.37 0.5 V IOUT = 300mA (SOT25), 1.7V < VOUT ≤ 2.1V 3
Dropout Voltage 0.32 0.45 V IOUT = 300mA (SOT25), 2.1V < VOUT ≤ 2.5V 3
Dropout Voltage 0.29 0.4 V IOUT = 300mA (SOT25), 2.5V < VOUT ≤ 3.0V 3
Dropout Voltage 0.24 0.33 V IOUT = 300mA (SOT25), 3.0V < VOUT ≤ 3.6V 3
Dropout Voltage 0.22 0.31 V IOUT = 300mA (SOT25), 3.6V < VOUT ≤ 4.5V 3
EN Input Low Voltage 0 0.5 V 3
EN Input High Voltage 1.4 5.5 V 3
EN Input Leakage -1 1 µA VEN = 0, VIN = 5.0V or VEN = 5.0V, VIN = 0V 3
Output Voltage Temperature Coefficient -80 80 ppm/°C IOUT = 30mA, TA = -40°C to +85°C 3
Fold-back Short Current 55 mA VOUT Short to Ground 3
PSRR 80 dB VIN = VOUT+1V, Ripple 0.2Vp-pAC, VOUT = 1.0V to 4.5V, IOUT = 30mA, f = 1kHz 3
Output Noise Voltage 60 µVrms BW = 10Hz to 100kHz, VOUT = 1.0V, IOUT = 30mA 3
Thermal Shutdown Threshold TSHDN 150 °C 3
Thermal Shutdown Hysteresis THYS 20 °C 3
On Resistance of N-Channel for Auto-Discharge 40 Ω VIN = 4.0V, VEN = 0V (Disabled) 3
Thermal Resistance Junction to Ambient JA 179 °C/W SOT25 3
Thermal Resistance Junction to Case JC 52 °C/W SOT25 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper capacitor is recommended between VIN and GND pins to decouple input power supply glitch. This input capacitor must be located as close as possible to the device to assure input stability and reduce no 9

CAD (KiCad official)

  • Symbol: AP7330D-W5-7
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-25 (KiCad packages3D, STEP)
  • 3D model files: ap7330d-w5-7-etched.step / ap7330d-w5-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap7330d-w5-7.step / ap7330d-w5-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (13 pp, sha256 4f1f5632d1694870, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF