component
AP7315DQ-18W5-7
Public Made by Adomby adom
Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
AP7315DQ-18W5-7
Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-25
AP7315DQ-18W5-7 from Diodes Incorporated, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input pin; operating input range 1.7V to 5.25V (6.0V absolute maximum), with a minimum 0.47µF ceramic capacitor to GND recommended close to the pin. |
| 2 | GND | power_in | Ground pin; connect to the external circuit ground and use a wide copper trace. |
| 3 | EN | input | Enable pin that must be driven high or low and not left floating; high (1.3V to 5.25V) enables the regulator and low (0V to 0.5V) puts it into shutdown. |
| 4 | NC | unconnected | Not connected internally; recommended connection to GND to maximize PCB copper for thermal dissipation. |
| 5 | VOUT | power_out | Regulated power output pin (1.8V fixed for this -18 option) supplying up to 150mA, with a 0.47µF output capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-25 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 1.7 | 5.25 | V | TA = -40°C to +85°C | 4 | |
| Output Voltage Accuracy (offset from nominal VOUT) | VOUT | -20 | 20 | mV | VOUT < 2.0V, VIN = VOUT+1V, TA = +25°C (printed VOUT-20mV / VOUT+20mV) | 4 | |
| Line Regulation | dVOUT/dVIN/VOUT | 0.02 | 0.1 | %/V | VIN = (VOUT, Nom + 1.0V) to 5.25V, IOUT = 1.0mA | 4 | |
| Load Regulation | dVOUT/VOUT/dIOUT | 0.5 | 1 | %/A | VIN = VOUT - Nom + 1.0V, IOUT = 1mA to 150mA | 4 | |
| Quiescent Current | IQ | 20 | 35 | 60 | μA | IOUT = 0mA | 4 |
| Quiescent Current | IQ | 30 | 60 | 100 | μA | IOUT = 150mA | 4 |
| Standby Current | ISTANDBY | 0.01 | 1 | μA | VEN = 0V (Disabled) | 4 | |
| Output Current | IOUT | 150 | mA | 4 | |||
| Dropout Voltage | VDROP | 0.34 | 0.44 | V | IOUT = 150mA, 1.7V ≤ VOUT < 2.0V | 4 | |
| EN Input Low Voltage | VEN(L) | 0 | 0.5 | V | 4 | ||
| EN Input High Voltage | VEN(H) | 1.3 | 5.25 | V | 4 | ||
| EN Input Leakage | -1 | 1 | µA | VEN = 0, VIN = 5.0V or VEN = 5.0V, VIN = 0V | 4 | ||
| Output Voltage Temperature Coefficient | -30 | 30 | ppm/°C | IOUT = 30mA, TA = -40°C to +85°C | 4 | ||
| Fold-back Short Current | 55 | mA | VOUT Short to Ground | 4 | |||
| PSRR | PSRR | 75 | dB | VIN = (VOUT+1V)VDC + 0.2Vp-pAC, VOUT ≥ 1.8V, IOUT = 30mA, f = 1kHz | 4 | ||
| Output Noise Voltage | 60 | µVrms | BW = 10Hz to 100kHz, IOUT = 30mA | 4 | |||
| On Resistance of N-channel for Auto-Discharge | 30 | Ω | VIN = 4.0V VEN = 0V (Disabled) | 4 | |||
| Input Voltage | VIN | 6 | V | TA = +25°C | 3 | ||
| Input Voltage EN | VEN | 6 | V | TA = +25°C | 3 | ||
| Output Voltage | VOUT | -0.3 | V | -0.3 to VIN +0.3 V, TA = +25°C | 3 | ||
| Output Current | IOUT | 300 | mA | TA = +25°C | 3 | ||
| Power Dissipation | PD | 400 | mW | TA = +25°C | 3 | ||
| Operating Ambient Temperature | TA | -40 | 85 | °C | 3 | ||
| Storage Temperature | TSTG | -55 | 125 | °C | 3 | ||
| Input Voltage | VIN | 1.7 | 5.25 | V | 3 | ||
| Output Current | IOUT | 0 | 150 | mA | 3 | ||
| Operating Ambient Temperature | TA | -40 | 85 | °C | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | capacitor is recommended between VIN and GND pins to decouple input power supply glitch. This input capacitor must be located as close as possible to the device to assure input stability and reduce no | 11 |
CAD (land: KiCad; 3D: generated from the datasheet)
- Symbol:
AP7315DQ-18W5-7 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-25, generated on the KiCad land (body 1.6 x 2.9 mm, terminals on the pads, 1.45 mm tall, datasheet A, max). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
- 3D model files:
ap7315dq-18w5-7-etched.step/ap7315dq-18w5-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap7315dq-18w5-7.step/ap7315dq-18w5-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (23 pp, sha256
2f34747c2b11e792, retrieved 2026-11-13, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).