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docs ap7312-1833w6-7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
ap7312-1833w6-7-etched.fit.json ap7312-1833w6-7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ap7312-1833w6-7-etched.glb ap7312-1833w6-7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ap7312-1833w6-7-etched.step ap7312-1833w6-7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ap7312-1833w6-7.glb Publish 0.1.0 · Ray 2mo ago
ap7312-1833w6-7.kicad_mod Publish 0.1.0 · Ray 2mo ago
ap7312-1833w6-7.kicad_sym Publish 0.1.0 · Ray 2mo ago
ap7312-1833w6-7.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
ap7312-1833w6-7.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json ap7312-1833w6-7: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 27d ago
README.md ap7312-1833w6-7: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

AP7312-1833W6-7

Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-26

AP7312-1833W6-7 from Diodes Incorporated, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT2 power_out Voltage output 2 (3.3V nominal for the -1833 option). Bypass to ground through a 1µF ceramic capacitor. Rated up to 150mA continuous.
2 GND power_in Device ground reference for both regulator channels and internal control circuitry.
3 EN2 input Enable input for channel 2 (OUT2), active high. VIH ≥ 1.4V enables the regulator; VIL ≤ 0.4V shuts it down. EN input current ±1µA max.
4 EN1 input Enable input for channel 1 (OUT1), active high. VIH ≥ 1.4V enables the regulator; VIL ≤ 0.4V shuts it down. EN input current ±1µA max.
5 IN power_in Supply voltage input for both regulator channels. Operating range 2V to 6V (absolute max 6.5V). Bypass to ground through at least a 1µF capacitor.
6 OUT1 power_out Voltage output 1 (1.8V nominal for the -1833 option). Bypass to ground through a 1µF ceramic capacitor. Rated up to 150mA continuous.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-26
Category PMIC
Pins 6

Ordering variants

  • AP7312-1833W6-7
  • AP7312-1833W6-7FDC

CAD (KiCad official)

  • Symbol: AP7312-1833W6-7
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-26 (KiCad packages3D, STEP)
  • 3D model files: ap7312-1833w6-7-etched.step / ap7312-1833w6-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap7312-1833w6-7.step / ap7312-1833w6-7.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ap7312-1833w6-7.step 97 KB You want the bare part, or you mark your own boards.
ap7312-1833w6-7-etched.step 2.6 MB You want the part with AP7312-1833W6-7 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 640 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (18 pp, sha256 1b2f6890ecd009a0, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF