component

AP7115-30SEG-7

Public Made by Adom

by adom

Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-353. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)ap7115-30seg-7factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 6d ago
viewers ap7115-30seg-7: viewers · Ray 6d ago
ap7115-30seg-7-etched.glb Publish 0.1.0 · Ray 6d ago
ap7115-30seg-7-etched.step ap7115-30seg-7: factory component page (tier=mfr) · Ray 6d ago
ap7115-30seg-7-hero.glb ap7115-30seg-7: hero GLB from the etched model (keeps the MPN mark) · Ray 6d ago
ap7115-30seg-7-hero.overlay.json Publish 0.1.0 · Ray 6d ago
ap7115-30seg-7.glb Publish 0.1.0 · Ray 6d ago
ap7115-30seg-7.kicad_mod Publish 0.1.0 · Ray 6d ago
ap7115-30seg-7.kicad_sym Publish 0.1.0 · Ray 6d ago
ap7115-30seg-7.lbr Publish 0.1.0 · Ray 6d ago
ap7115-30seg-7.step Publish 0.1.0 · Ray 6d ago
package.json Publish 0.1.0 · Ray 6d ago
page.json Set visibility: public · Ray 6d ago
README.md Publish 0.1.0 · Ray 6d ago

AP7115-30SEG-7

Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-353

AP7115-30SEG-7 from Diodes Incorporated, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Voltage input with a recommended operating range of 2.5V to 5.5V and an absolute maximum input voltage of -0.3V to 5.5V, and a 1µF input capacitor is required between IN and GND.
2 GND power_in Ground reference pin for the regulator, to which the 1µF input capacitor and the 0.1µF band-gap bypass capacitor return.
3 EN input Chip enable control in which pulling EN low shuts the regulator down and driving it high turns it on, with VIH minimum 2.0V, VIL maximum 0.7V, and an absolute maximum pin voltage of -0.3V to 5.5V.
4 BP passive Band-gap bypass pin where a 0.1µF capacitor between BP and GND reduces output voltage noise, with an absolute maximum pin voltage of -0.3V to 5.5V.
5 OUT power_out Regulated voltage output rated for up to 150mA output current, with absolute maximum output voltage of -0.3V to VIN+0.3V.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-353
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Input Voltage VIN 2.5 5.5 V IL = 0 to 150mA 3
Output Voltage Accuracy VOUT/VOUT -2 2 % VIN = VOUT + 1V where 1mA ≤ IOUT ≤ 50mA 3
Dropout Voltage VDO 200 300 mV IL = 150mA 3
Output Current IOUT 150 mA VIN - VOUT = 1V 3
Quiescent Current IQ 50 80 µA VIN = VOUT + 1V where IOUT = 0 and VEN = VIN 3
Shutdown Current ISHUTDOWN 0.1 1 µA VIN = VOUT + 1V where IOUT = 0 and VEN = 0 3
Current Limit ILIMIT 200 250 mA 3
EN Input High Voltage VIH,EN 2 V 3
EN Input Low Voltage VIL,EN 0.7 V 3
EN Pin Leakage Current IEN 0.01 0.1 µA VEN = VIN @VIN = 5.0V and VSS = 0V 3
Line Regulation VO/VIN 0.02 0.1 %/V VOUT + 0.5V ≤ VIN ≤ 5.5V where VOUT > 2.0V, IOUT = 30mA 3
Load Regulation VLOAD 0.003 0.006 %/mA 1mA ≤ IL ≤ 150mA where VIN = VOUT + 1V 3
Tempco of Bandgap Reference VREF/T 30 50 ppm/°C 3
Tempco of Output Voltage VOUT/T 50 100 ppm/°C IOUT = 30mA, -40°C ≤ TA ≤ +85°C 3
Input Voltage (recommended) VIN 2.5 5.5 V 3
Output Current (recommended) IOUT 150 mA 3
Operating Ambient Temperature TA -40 85 °C 3
ESD HBM Protection ESD HBM 3.5 kV Human Body Model 2
ESD MM Protection ESD MM 400 V Machine Model 2
Input Voltage VIN -0.3 5.5 V 2
EN Pin Voltage VEN -0.3 5.5 V 2
Output Voltage VOUT -0.3 V Printed upper limit VIN+0.3 2
Band Gap Bypass Pin Voltage VBP -0.3 5.5 V 2
Power Dissipation PD 500 mW 2
Operating Junction Temperature Range TJ -40 125 °C 2
Storage Temperature Range TST -65 150 °C 2
Thermal Resistance Junction-to-Ambient (SOT353) θJA 337 °C/W SOT353, FR-4 PCB, 2oz copper, minimum recommended pad layout (Note 4) 3
Thermal Resistance Junction-to-Case (SOT353) θJC 121 °C/W SOT353, FR-4 PCB, 2oz copper, minimum recommended pad layout (Note 4) 3

CAD (KiCad official)

  • Symbol: AP7115-30SEG-7
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353 (KiCad packages3D, STEP)
  • 3D model files: ap7115-30seg-7-etched.step / ap7115-30seg-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap7115-30seg-7.step / ap7115-30seg-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (12 pp, sha256 55c2acddfd9ee1fa, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF