# AP7115-18WG-7

**Diodes Incorporated** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-25

AP7115-18WG-7 from Diodes Incorporated, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Voltage input with a recommended operating range of 2.5V to 5.5V and an absolute maximum rating of -0.3V to 5.5V, and a 1µF input capacitor is required between IN and GND. |
| 2 | GND | power_in | Ground reference pin for the regulator; the datasheet gives no separate electrical limits for this pin. |
| 3 | EN | input | Chip enable control that shuts the regulator down when pulled low and turns it on when driven high, with VIH minimum 2.0V, VIL maximum 0.7V, and an absolute maximum pin voltage of -0.3V to 5.5V. |
| 4 | BP | passive | Band-gap bypass pin where a 0.1µF capacitor to GND reduces output voltage noise, with an absolute maximum pin voltage of -0.3V to 5.5V. |
| 5 | OUT | power_out | Regulated voltage output rated for up to 150mA, with an absolute maximum voltage of -0.3V to VIN+0.3V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-25 |
| Category | Power Management (PMIC) |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 2.5 |  | 5.5 | V |  | 3 |
| Output Current | IOUT |  |  | 150 | mA |  | 3 |
| Operating Ambient Temperature | TA | -40 |  | 85 | °C |  | 3 |
| ESD Protection, Human Body Model | ESD HBM |  |  | 3.5 | kV | Human Body Model | 2 |
| ESD Protection, Machine Model | ESD MM |  |  | 400 | V | Machine Model | 2 |
| Input Voltage | VIN | -0.3 |  | 5.5 | V |  | 2 |
| EN Pin Voltage | VEN | -0.3 |  | 5.5 | V |  | 2 |
| Output Voltage | VOUT | -0.3 |  |  | V | Upper limit printed as VIN+0.3 V (not numeric) | 2 |
| Band Gap Bypass Pin Voltage | VBP | -0.3 |  | 5.5 | V |  | 2 |
| Power Dissipation | PD |  |  | 500 | mW |  | 2 |
| Operating Junction Temperature Range | TJ | -40 |  | 125 | °C |  | 2 |
| Storage Temperature Range | TST | -65 |  | 150 | °C |  | 2 |
| Operating Input Voltage | VIN | 2.5 |  | 5.5 | V | IL = 0 to 150mA | 3 |
| Output Voltage Accuracy | VOUT/VOUT | -2 |  | 2 | % | VIN = VOUT + 1V where 1mA ≤ IOUT ≤ 50mA | 3 |
| Dropout Voltage | VDO |  | 200 | 300 | mV | IL = 150mA | 3 |
| Output Current | IOUT | 150 |  |  | mA | VIN - VOUT = 1V | 3 |
| Quiescent Current | IQ |  | 50 | 80 | µA | VIN = VOUT + 1V where IOUT = 0 and VEN = VIN | 3 |
| Shutdown Current | ISHUTDOWN |  | 0.1 | 1 | µA | VIN = VOUT + 1V where IOUT = 0 and VEN = 0 | 3 |
| Current Limit | ILIMIT | 200 | 250 |  | mA |  | 3 |
| Tempco of Bandgap Reference | VREF/T |  | 30 | 50 | ppm/°C |  | 3 |
| Tempco of Output Voltage | VOUT/T |  | 50 | 100 | ppm/°C | IOUT = 30mA, -40°C ≤ TA ≤ +85°C | 3 |
| EN Input Low Voltage | VIL,EN |  |  | 0.7 | V |  | 3 |
| EN Pin Leakage Current | IEN |  | 0.01 | 0.1 | µA | VEN = VIN @VIN = 5.0V and VSS = 0V | 3 |
| Line Regulation | VO/VIN |  | 0.02 | 0.1 | %/V | VOUT + 0.5V ≤ VIN ≤ 5.5V where VOUT > 2.0V, IOUT = 30mA | 3 |
| Load Regulation | VLOAD |  | 0.003 | 0.006 | %/mA | 1mA ≤ IL ≤ 150mA where VIN = VOUT + 1V | 3 |
| EN Input High Voltage | VIH,EN | 2 |  |  | V |  | 3 |
| Thermal Resistance Junction-to-Ambient (SOT25) | θJA |  | 200 |  | °C/W | SOT25, Note 4 (FR-4, 2oz copper, minimum recommended pad layout) | 3 |
| Thermal Resistance Junction-to-Case (SOT25) | θJC |  | 52 |  | °C/W | SOT25, Note 4 | 3 |

## CAD (land: KiCad; 3D: generated from the datasheet)

- Symbol: `AP7115-18WG-7`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-25, generated on the KiCad land (body 1.6 x 2.8 mm, terminals on the pads, 1.1 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
- 3D model files: `ap7115-18wg-7-etched.step` / `ap7115-18wg-7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ap7115-18wg-7.step` / `ap7115-18wg-7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/AP7115-18WG-7.pdf) (12 pp, sha256 `55c2acddfd9ee1fa`, retrieved 2026-11-13, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).

[Datasheet PDF](docs/ap7115-18wg-7-datasheet.pdf)