component

AP7115-12WG-7

Public Made by Adom

by adom

Diodes Incorporated Linear Voltage Regulators (LDO), SOT-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icsap7115-12wg-7factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 11d ago
viewers ap7115-12wg-7: viewers · Ray 11d ago
ap7115-12wg-7-etched.glb Publish 0.1.0 · Ray 11d ago
ap7115-12wg-7-etched.step ap7115-12wg-7: factory component page (tier=mfr) · Ray 11d ago
ap7115-12wg-7-hero.glb ap7115-12wg-7: hero GLB from the etched model (keeps the MPN mark) · Ray 11d ago
ap7115-12wg-7-hero.overlay.json Publish 0.1.0 · Ray 11d ago
ap7115-12wg-7.glb Publish 0.1.0 · Ray 11d ago
ap7115-12wg-7.kicad_mod Publish 0.1.0 · Ray 11d ago
ap7115-12wg-7.kicad_sym Publish 0.1.0 · Ray 11d ago
ap7115-12wg-7.lbr Publish 0.1.0 · Ray 11d ago
ap7115-12wg-7.step Publish 0.1.0 · Ray 11d ago
package.json Publish 0.1.0 · Ray 11d ago
page.json Set visibility: public · Ray 11d ago
README.md Publish 0.1.0 · Ray 11d ago

AP7115-12WG-7

Diodes Incorporated · Linear Voltage Regulators (LDO) · SOT-25

AP7115-12WG-7 from Diodes Incorporated, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Voltage input accepting 2.5V to 5.5V, requiring a 1µF capacitor to GND.
2 GND power_in Ground.
3 EN input Chip enable control: pulled low to shut down, driven high (VIH min 2.0V, VIL max 0.7V) to turn on, and tied to VIN if shutdown is not required.
4 BP passive Band-gap bypass pin where a 0.1µF capacitor to GND reduces output voltage noise, with a voltage range of -0.3 to 5.5V.
5 OUT power_out Regulated voltage output (1.2V for the -12 option), guaranteed 150mA, requiring a 1µF or greater output capacitor.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-25
Category Power Management ICs
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Input Voltage VIN 2.5 5.5 V IL = 0 to 150mA 3
Output Voltage Accuracy VOUT/VOUT -2 2 % VIN = VOUT + 1V where 1mA ≤ IOUT ≤ 50mA 3
Dropout Voltage VDO 200 300 mV IL = 150mA 3
Output Current IOUT 150 mA VIN - VOUT = 1V 3
Quiescent Current IQ 50 80 µA VIN = VOUT + 1V where IOUT = 0 and VEN = VIN 3
Shutdown Current ISHUTDOWN 0.1 1 µA VIN = VOUT + 1V where IOUT = 0 and VEN = 0 3
Current Limit ILIMIT 200 250 mA 3
Tempco of Bandgap Reference VREF/T 30 50 ppm/°C 3
Tempco of Output Voltage VOUT/T 50 100 ppm/°C IOUT = 30mA, -40°C ≤ TA ≤ +85°C 3
EN High Threshold VIH,EN 2 V 3
EN Low Threshold VIL,EN 0.7 V 3
EN Pin Leakage Current (VEN = VIN) IEN 0.01 0.1 µA VEN = VIN @VIN = 5.0V and VSS = 0V 3
EN Pin Leakage Current (VEN = VSS) IEN 0.01 0.1 µA VEN = VSS @VIN = 5.0V and VSS = 0V 3
Line Regulation VO/VIN 0.02 0.1 %/V VOUT + 0.5V ≤ VIN ≤ 5.5V where VOUT > 2.0V, IOUT = 30mA 3
Load Regulation VLOAD 0.003 0.006 %/mA 1mA ≤ IL ≤ 150mA where VIN = VOUT + 1V 3
Thermal Shutdown TSHUTDOWN 150 °C 3
Power Supply Rejection Ratio PSRR 70 dB IOUT = 30mA, f = 1kHz 3
Output Noise en 50 µVrms BW = 10Hz to 100kHz 3
Thermal Resistance Junction-to-Ambient θJA 200 °C/W SOT25, FR-4, 2oz copper, minimum recommended pad layout 3
Thermal Resistance Junction-to-Case θJC 52 °C/W SOT25, FR-4, 2oz copper, minimum recommended pad layout 3
Input Voltage (recommended) VIN 2.5 5.5 V 3
Output Current (recommended) IOUT 150 mA 3
Operating Ambient Temperature TA -40 85 °C 3
ESD HBM ESD HBM 3.5 kV Human Body Model, TA = +25°C 2
ESD MM ESD MM 400 V Machine Model, TA = +25°C 2
Input Voltage (absolute max) VIN -0.3 5.5 V TA = +25°C 2
EN Pin Voltage VEN -0.3 5.5 V TA = +25°C 2
Band Gap Bypass Pin Voltage VBP -0.3 5.5 V TA = +25°C 2
Power Dissipation PD 500 mW TA = +25°C 2
Operating Junction Temperature Range TJ -40 125 °C TA = +25°C 2
Storage Temperature Range TST -65 150 °C TA = +25°C 2

CAD (KiCad official)

  • Symbol: AP7115-12WG-7
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-25 (KiCad packages3D, STEP)
  • 3D model files: ap7115-12wg-7-etched.step / ap7115-12wg-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap7115-12wg-7.step / ap7115-12wg-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (12 pp, sha256 55c2acddfd9ee1fa, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF