AP63200WU-7
Public Made by Adomby adom
Diodes Incorporated DC-DC Converters, TSOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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AP63200WU-7
Diodes Incorporated · DC-DC Converters · TSOT-23-6
AP63200WU-7 from Diodes Incorporated, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Feedback sensing terminal for the output voltage. Connect this pin to the resistive divider of the output. Internal reference is 0.8V (typ) for AP63200/AP63201. |
| 2 | EN | input | Enable Input. Digital input that turns the regulator on or off. Drive EN high to turn on and low to turn off. Attach to VIN or leave open for automatic startup. Precision threshold of 1.18V allows UVLO programming. |
| 3 | VIN | power_in | Power Input. VIN supplies power to the IC and to the step-down converter switches. Drive with a 3.8V to 32V power source. Bypass VIN to GND with a suitably large capacitor to eliminate switching noise. |
| 4 | GND | power_in | Power Ground. Common ground reference for the IC and power stage. |
| 5 | SW | output | Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the load. A capacitor is required from SW to BST to power the high-side switch. |
| 6 | BST | power_in | High-Side Gate Drive Boost Input. BST supplies the drive for the high-side N-Channel MOSFET. A 100nF capacitor is recommended from SW to BST to power the high-side switch. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSOT-23-6 |
| Category | PMIC |
| Pins | 6 |
Ordering variants
AP63200WU-7
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Shutdown Supply Current | ISHDN | 1 | 3 | µA | VEN = 0V | 5 | |
| VIN Under Voltage Threshold (Rising) | VUVLO | 3.3 | 3.5 | 3.7 | V | 5 | |
| HS Peak Current Limit | IPEAK_LIMIT | 2.5 | 2.8 | 3.1 | A | 5 | |
| LS Valley Current Limit | IVALLEY_LIMIT | 2.5 | 3.2 | 3.9 | A | 5 | |
| Frequency Spread Spectrum | FSS | -6 | 6 | % | 5 | ||
| Feedback Voltage | VFB | 792 | 800 | 808 | mV | CCM, AP63200/AP63201 | 5 |
| EN Logic High | VEN_H | 1.15 | 1.18 | 1.23 | V | 5 | |
| EN Logic Low | VEN_L | 1.05 | 1.1 | 1.15 | V | 5 | |
| VIN Supply Voltage (DC) | VIN | -0.3 | 35 | V | DC | 4 | |
| VIN Supply Voltage (400ms) | VIN | -0.3 | 40 | V | 400ms | 4 | |
| Switch Node Voltage | VSW | -1 | V | Upper limit printed as VIN + 0.3 | 4 | ||
| Bootstrap Voltage | VBST | -0.3 | 6 | V | Referenced to VSW: VSW - 0.3 to VSW + 6.0 | 4 | |
| Feedback Voltage (absolute maximum) | VFB | -0.3 | 6 | V | 4 | ||
| Enable/UVLO Voltage | VEN | -0.3 | 35 | V | 4 | ||
| Storage Temperature | TST | -65 | 150 | °C | 4 | ||
| Junction Temperature | TJ | 160 | °C | 4 | |||
| Lead Temperature | TL | 260 | °C | 4 | |||
| ESD Human Body Model | 2000 | V | HBM | 4 | |||
| ESD Charge Device Model | 1000 | V | CDM | 4 | |||
| Supply Voltage (recommended) | VIN | 3.8 | 32 | V | 4 | ||
| Operating Ambient Temperature Range | TA | -40 | 85 | °C | 4 | ||
| Quiescent Supply Current | IQ | 22 | µA | VEN = OPEN, VFB = 1.0V | 5 | ||
| VIN Under Voltage Threshold Hysteresis | 440 | mV | 5 | ||||
| High-Side Switch On-Resistance | RDS(ON)1 | 125 | mΩ | 5 | |||
| Low-Side Switch On-Resistance | RDS(ON)2 | 68 | mΩ | 5 | |||
| Oscillator Frequency (AP63200/AP63201) | fSW | 500 | kHz | 5 | |||
| Minimum On Time | tON | 80 | ns | 5 | |||
| EN Input Current | IEN | 5.5 | μA | VEN = 1.5V | 5 | ||
| EN Input Current | IEN | 1.5 | μA | VEN = 1V | 5 | ||
| Soft-Start Period | tSS | 4 | ms | 5 | |||
| Thermal Shutdown | TSD | 160 | °C | 5 | |||
| Thermal Hysteresis | THYS | 25 | °C | 5 | |||
| Junction to Ambient Thermal Resistance | θJA | 89 | °C/W | TSOT26, device on FR-4 single-layer PCB, 2oz copper, minimum recommended pad layout | 4 | ||
| Junction to Case Thermal Resistance | θJC | 39 | °C/W | TSOT26 | 4 |
CAD (KiCad official)
- Symbol:
AP63200WU-7 - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: TSOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
ap63200wu-7-etched.step/ap63200wu-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap63200wu-7.step/ap63200wu-7.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
ap63200wu-7.step |
97 KB | You want the bare part, or you mark your own boards. |
ap63200wu-7-etched.step |
2.2 MB | You want the part with AP63200WU-7 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 536 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (18 pp, sha256
ef99daa3789d835b, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AP63200WU-7
**Diodes Incorporated** · DC-DC Converters · TSOT-23-6
AP63200WU-7 from Diodes Incorporated, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Feedback sensing terminal for the output voltage. Connect this pin to the resistive divider of the output. Internal reference is 0.8V (typ) for AP63200/AP63201. |
| 2 | EN | input | Enable Input. Digital input that turns the regulator on or off. Drive EN high to turn on and low to turn off. Attach to VIN or leave open for automatic startup. Precision threshold of 1.18V allows UVLO programming. |
| 3 | VIN | power_in | Power Input. VIN supplies power to the IC and to the step-down converter switches. Drive with a 3.8V to 32V power source. Bypass VIN to GND with a suitably large capacitor to eliminate switching noise. |
| 4 | GND | power_in | Power Ground. Common ground reference for the IC and power stage. |
| 5 | SW | output | Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the load. A capacitor is required from SW to BST to power the high-side switch. |
| 6 | BST | power_in | High-Side Gate Drive Boost Input. BST supplies the drive for the high-side N-Channel MOSFET. A 100nF capacitor is recommended from SW to BST to power the high-side switch. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSOT-23-6 |
| Category | PMIC |
| Pins | 6 |
## Ordering variants
- `AP63200WU-7`
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Shutdown Supply Current | ISHDN | | 1 | 3 | µA | VEN = 0V | 5 |
| VIN Under Voltage Threshold (Rising) | VUVLO | 3.3 | 3.5 | 3.7 | V | | 5 |
| HS Peak Current Limit | IPEAK_LIMIT | 2.5 | 2.8 | 3.1 | A | | 5 |
| LS Valley Current Limit | IVALLEY_LIMIT | 2.5 | 3.2 | 3.9 | A | | 5 |
| Frequency Spread Spectrum | FSS | -6 | | 6 | % | | 5 |
| Feedback Voltage | VFB | 792 | 800 | 808 | mV | CCM, AP63200/AP63201 | 5 |
| EN Logic High | VEN_H | 1.15 | 1.18 | 1.23 | V | | 5 |
| EN Logic Low | VEN_L | 1.05 | 1.1 | 1.15 | V | | 5 |
| VIN Supply Voltage (DC) | VIN | -0.3 | | 35 | V | DC | 4 |
| VIN Supply Voltage (400ms) | VIN | -0.3 | | 40 | V | 400ms | 4 |
| Switch Node Voltage | VSW | -1 | | | V | Upper limit printed as VIN + 0.3 | 4 |
| Bootstrap Voltage | VBST | -0.3 | | 6 | V | Referenced to VSW: VSW - 0.3 to VSW + 6.0 | 4 |
| Feedback Voltage (absolute maximum) | VFB | -0.3 | | 6 | V | | 4 |
| Enable/UVLO Voltage | VEN | -0.3 | | 35 | V | | 4 |
| Storage Temperature | TST | -65 | | 150 | °C | | 4 |
| Junction Temperature | TJ | | | 160 | °C | | 4 |
| Lead Temperature | TL | | | 260 | °C | | 4 |
| ESD Human Body Model | | | | 2000 | V | HBM | 4 |
| ESD Charge Device Model | | | | 1000 | V | CDM | 4 |
| Supply Voltage (recommended) | VIN | 3.8 | | 32 | V | | 4 |
| Operating Ambient Temperature Range | TA | -40 | | 85 | °C | | 4 |
| Quiescent Supply Current | IQ | | 22 | | µA | VEN = OPEN, VFB = 1.0V | 5 |
| VIN Under Voltage Threshold Hysteresis | | | 440 | | mV | | 5 |
| High-Side Switch On-Resistance | RDS(ON)1 | | 125 | | mΩ | | 5 |
| Low-Side Switch On-Resistance | RDS(ON)2 | | 68 | | mΩ | | 5 |
| Oscillator Frequency (AP63200/AP63201) | fSW | | 500 | | kHz | | 5 |
| Minimum On Time | tON | | 80 | | ns | | 5 |
| EN Input Current | IEN | | 5.5 | | μA | VEN = 1.5V | 5 |
| EN Input Current | IEN | | 1.5 | | μA | VEN = 1V | 5 |
| Soft-Start Period | tSS | | 4 | | ms | | 5 |
| Thermal Shutdown | TSD | | 160 | | °C | | 5 |
| Thermal Hysteresis | THYS | | 25 | | °C | | 5 |
| Junction to Ambient Thermal Resistance | θJA | | 89 | | °C/W | TSOT26, device on FR-4 single-layer PCB, 2oz copper, minimum recommended pad layout | 4 |
| Junction to Case Thermal Resistance | θJC | | 39 | | °C/W | TSOT26 | 4 |
## CAD (KiCad official)
- Symbol: `AP63200WU-7`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: TSOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `ap63200wu-7-etched.step` / `ap63200wu-7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ap63200wu-7.step` / `ap63200wu-7.glb` are the bare package body.
## 3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
| [`ap63200wu-7.step`](ap63200wu-7.step) | 97 KB | You want the bare part, or you mark your own boards. |
| [`ap63200wu-7-etched.step`](ap63200wu-7-etched.step) | 2.2 MB | You want the part with `AP63200WU-7` already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 536 faces against 117 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/AP63200WU-7.pdf) (18 pp, sha256 `ef99daa3789d835b`, retrieved 2026-08-17, tier: manufacturer)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ap63200wu-7-datasheet.pdf)