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AP60P20K

ALLPOWER(ShenZhen Quan Li Semiconductor) · MOSFETs · TO-252

AP60P20K from ALLPOWER(ShenZhen Quan Li Semiconductor), in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate control input of the P-channel MOSFET, with absolute maximum gate-source voltage of ±12 V and a gate threshold of 0.35 V min to 1.0 V max at VDS=VGS, ID=-250µA.
2 D passive Drain terminal (also the exposed tab), rated for -20 V drain-source voltage and -60 A continuous drain current at Ta=25°C.
3 S passive Source terminal of the P-channel MOSFET, with a body diode continuous forward current of -60 A and a forward voltage of -1.2 V max at IS=-20A.

Key specifications

Parameter Value
Manufacturer ALLPOWER(ShenZhen Quan Li Semiconductor)
Package TO-252
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: AP60P20K
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: ap60p20k-etched.step / ap60p20k-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap60p20k.step / ap60p20k.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ALLPOWER(ShenZhen Quan Li Semiconductor) datasheet (6 pp, sha256 389628fc95b1aa2d, retrieved 2026-11-02, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF