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AP5N10S

ALLPOWER ShenZhen Quan Li Semiconductor · MOSFETs · SOT-23-3L

AP5N10S from ALLPOWER ShenZhen Quan Li Semiconductor, in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limited to ±20 V, threshold 1 V min to 3 V max at VDS=VGS, ID=250 µA, and the device is ESD protected.
2 S passive Source; MOSFET source terminal, with continuous drain current of 5 A and body diode forward current of 5 A max.
3 D passive Drain; drain-source voltage rated 100 V, continuous drain current 5 A, pulsed 21 A, RDS(ON) 115 mΩ typ at VGS=10 V.

Key specifications

Parameter Value
Manufacturer ALLPOWER ShenZhen Quan Li Semiconductor
Package SOT-23-3L
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: AP5N10S
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3L (KiCad packages3D, STEP)
  • 3D model files: ap5n10s-etched.step / ap5n10s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap5n10s.step / ap5n10s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ALLPOWER ShenZhen Quan Li Semiconductor datasheet (6 pp, sha256 bc163e04f1af70b2, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF