component
AP5056SPER
Public Made by Adomby adom
Wuxi Chipown Micro-electronics Battery Management ICs, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAP5056SPER
Wuxi Chipown Micro-electronics · Battery Management ICs · SOP-8-EP
AP5056SPER from Wuxi Chipown Micro-electronics, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TEMP | input | Battery temperature sense input for the NTC; charging pauses if the voltage is below 45% or above 80% of the input voltage, and tying it to GND disables temperature sensing. |
| 2 | PROG | bidirectional | Charge current program, monitor and shutdown pin; a 1% resistor to ground sets IBAT = (VPROG/RPROG)*1000, VPROG is 1V in constant-current mode, and leaving it open pulls it up (3uA) to the 1.21V shutdown threshold, clamped at about 2.4V. |
| 3 | GND | power_in | Power ground. |
| 4 | VCC | power_in | Positive input supply for charging, 4.25V to 6.5V, needing a bypass capacitor of at least 10uF; the charger enters shutdown when VCC is within 30mV of the BAT voltage. |
| 5 | BAT | power_out | Battery connection that supplies the charge current and regulates the final float voltage to 4.2V. |
| 6 | STDBY | output | Charge-complete indicator, pulled low through an internal switch when charging is complete, otherwise high impedance. |
| 7 | CHRG | output | Open-drain charge status output, pulled low by an internal N-channel MOSFET while charging, otherwise high impedance. |
| 8 | CE | input | Chip enable input; high level (above 1.2V) enables normal operation, low level (below 0.6V) disables charging, and it accepts TTL or CMOS levels. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi Chipown Micro-electronics |
| Package | SOP-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input supply voltage | Vcc | 4.25 | 6.5 | V | 3 | ||
| Input supply current, charge mode | Icc | 350 | 2000 | uA | Charge mode, RPROG=10K | 3 | |
| Input supply current, standby mode | Icc | 150 | 500 | uA | Standby mode | 3 | |
| Input supply current, shutdown mode | Icc | 50 | 100 | uA | Shutdown (RPROG not connected, Vcc<Vbat or Vcc<Vuv) | 3 | |
| Regulated output (float) voltage | Vfloat | 4.177 | 4.263 | V | 0°C≤TA≤85°C, IBAT=40mA | 3 | |
| BAT pin current, current mode | Ibat | 450 | 500 | 550 | mA | RPROG=2k, current mode | 3 |
| BAT pin current, current mode | Ibat | 900 | 1000 | 1100 | mA | RPROG=1k, current mode | 3 |
| BAT pin current, standby mode | Ibat | -6 | -2.5 | 0 | uA | Standby mode, Vbat=4.2V | 3 |
| BAT pin current, shutdown mode | Ibat | 1 | 2.5 | uA | Shutdown mode | 3 | |
| BAT pin current, sleep mode | Ibat | 0.3 | 2.5 | uA | Sleep mode, Vcc=0V | 3 | |
| Trickle charge current | Itrikl | 90 | 100 | 110 | mA | Vbat<Vtrikl, Rprog=1k | 3 |
| Trickle charge threshold voltage | Vtrikl | 2.8 | 2.9 | 3 | V | RPROG=10K, Vbat rising | 3 |
| Trickle charge hysteresis voltage | Vtrhys | 118 | 135 | 152 | mV | RPROG=10k | 3 |
| VCC undervoltage lockout threshold | Vuv | 3.7 | 3.8 | 3.93 | V | Vcc low to high | 3 |
| VCC undervoltage lockout hysteresis | Vuvhys | 150 | 200 | 300 | mV | 3 | |
| VCC-VBAT lockout threshold voltage, rising | Vasd | 50 | 100 | 140 | mV | Vcc low to high | 3 |
| VCC-VBAT lockout threshold voltage, falling | Vasd | 5 | 40 | 50 | mV | Vcc high to low | 3 |
| C/10 termination current threshold | Iterm | 0.085 | 0.1 | 0.115 | mA/mA | RPROG=1k | 3 |
| PROG pin voltage | Vprog | 0.93 | 1 | 1.07 | V | RPROG=1k, current mode | 3 |
| CHRG pin output low voltage | Vchrg | 0.35 | 0.6 | V | Ichrg=2.5mA | 3 | |
| STDBY pin output low voltage | Vstdby | 0.35 | 0.6 | V | Istdby=2.5mA | 3 | |
| Recharge battery threshold voltage | ΔVrecg | 50 | 100 | 200 | mV | VFLOAT - VRECHRG | 4 |
| CE high voltage | Vce-h | 1.2 | V | 4 | |||
| CE low voltage | Vce-l | 0.6 | V | 4 | |||
| TEMP pin high threshold | Vtemp-h | 80 | 82 | %Vcc | 4 | ||
| TEMP pin low threshold | Vtemp-l | 43 | 45 | %Vcc | 4 | ||
| Junction temperature in thermal limiting | Tlim | 145 | °C | 4 | |||
| Input supply voltage | Vcc | -0.3 | 8 | V | Relative to VSS | 3 | |
| PROG pin voltage | Vprog | -0.3 | V | VSS-0.3 to Vcc+0.3 | 3 | ||
| BAT pin voltage | Vbat | -0.3 | 8 | V | Vss-0.3 to 8 | 3 | |
| CHRG pin voltage | Vchrg | -0.3 | 8 | V | VSS-0.3 to VSS+8 | 3 | |
| BAT pin current | Ibat | 1400 | mA | 3 | |||
| PROG pin current | Iprog | 1400 | uA | 3 | |||
| Operating ambient temperature | Topa | -40 | 85 | °C | 3 | ||
| Storage temperature | Tstr | -65 | 125 | °C | 3 | ||
| Lead temperature | 260 | °C | Soldering, 10s | 3 |
CAD (KiCad official)
- Symbol:
AP5056SPER - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
ap5056sper-etched.step/ap5056sper-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap5056sper.step/ap5056sper.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi Chipown Micro-electronics datasheet (10 pp, sha256
8f776abb294c6840, retrieved 2026-10-22, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).