component
AP22815AWT-7
Public Made by Adomby adom
Diodes Incorporated Power Distribution Switches, TSOT-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AP22815AWT-7
Diodes Incorporated · Power Distribution Switches · TSOT-25
AP22815AWT-7 from Diodes Incorporated, in a TSOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Voltage output of the power switch, with a recommended VOUT range of 0 to 23 V and an absolute maximum of -0.3 to 28 V (VOUT to GND or VIN); the pin integrates output discharge circuitry. |
| 2 | GND | power_in | Ground pin of the circuitry. |
| 3 | FLG | output | Open-drain overcurrent and overtemperature fault flag, active low when triggered, asserted after a 7 ms typical deglitch (blanking) time, with a rated FLG off current of 1 µA maximum at VFLG = 5 V. |
| 4 | EN | input | Enable input; the AP22815AWT-7 is the Active-High option per the ordering information, with VIH of at least 1.2 V and VIL of no higher than 0.4 V, and it should not be left floating. |
| 5 | IN | power_in | Voltage input pin, with an operating range of 3.0 V to 5.5 V and an absolute maximum of -0.3 to 6.0 V; a 1 µF X7R or X5R ceramic bypass capacitor is required between IN and GND close to the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSOT-25 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 3 | 5.5 | V | 4 | ||
| Output Current | IOUT | 0 | 3 | A | 4.0V ≤ VIN ≤ 5.5V | 4 | |
| Output Current | IOUT | 0 | 1.5 | A | 3.0V ≤ VIN < 4.0V | 4 | |
| EN Input Logic Low Voltage | VIL | 0 | 0.4 | V | 4 | ||
| Output Voltage | VOUT | 0 | 23 | V | 4 | ||
| EN Input Logic High Voltage | VIH | 1.2 | V | 4 | |||
| Operating Ambient Temperature | TA | -40 | 85 | C | 4 | ||
| ESD Human Body Model | ESD HBM | 2000 | V | Ratings at TA = +25°C | 4 | ||
| ESD Machine Model | ESD MM | 200 | V | Ratings at TA = +25°C | 4 | ||
| Input Voltage | VIN | -0.3 | 6 | V | Ratings at TA = +25°C | 4 | |
| Output Voltage | VOUT | -0.3 | 28 | V | VOUT to GND, VOUT to VIN | 4 | |
| Enable Voltage | VEN | -0.3 | V | Printed maximum is (VIN +0.3) | 4 | ||
| Maximum Junction Temperature | TJ(max) | 150 | °C | 4 | |||
| Storage Temperature | TSTG | -65 | 150 | °C | 4 | ||
| Thermal Resistance, Junction to Ambient (TSOT25) | RΘJA | 85 | °C/W | Note 6: TA = +25°C, four-layer high thermal conductivity board per JEDEC 51-7 | 4 | ||
| Thermal Resistance, Junction to Case (TSOT25) | RΘJC | 32 | °C/W | Note 6: TA = +25°C, four-layer high thermal conductivity board per JEDEC 51-7 | 4 | ||
| Input UVLO (VIN rising) | VUVLO | 2.1 | 2.5 | 2.9 | V | VIN Rising | 5 |
| Input Shutdown Current | ISHDN | 0.1 | 10 | µA | Disabled, OUT = Open (Discharge Current Included) | 5 | |
| Input Leakage Current | ILEAK | 0.1 | 1 | µA | Disabled, OUT Grounded | 5 | |
| Reverse Leakage Current | IREV | 0.5 | 15 | µA | Disabled, VIN = 0V, VOUT = 5V, IREV at OUT | 5 | |
| Reverse Leakage Current | IREV | 0.5 | 30 | µA | Disabled, VIN = 0V, VOUT = 20V, IREV at OUT | 5 | |
| Switch On-Resistance (AP22815) | RDS(ON) | 40 | 50 | mΩ | VIN = 5.0V, IOUT = 1A | 5 | |
| Overload Current Limit (AP22815) | ILIMIT | 3.1 | 3.6 | 4.2 | A | VIN = 5V, VOUT = 4V | 5 |
| EN Input Logic Low Voltage | VIL | 0.4 | V | VIN = 5V | 5 | ||
| EN Input Logic High Voltage | VIH | 1.2 | V | VIN = 5V | 5 | ||
| EN Input Leakage | ILEAK-EN | 1 | 2 | µA | VIN = 5V, VEN = 0V and 5.5V | 5 | |
| Output Leakage Current | ILEAK-O | 0.5 | 1 | µA | Disabled, VOUT = 0V | 5 | |
| Output Turn-On Rise Time | tR | 1 | 1.9 | 3.5 | ms | CL = 10µF, RLOAD = 10Ω @ VIN = 5V (Figure 1) | 5 |
| FLG Output FET On-Resistance | RFLG | 40 | 60 | Ω | IFLG = 10mA | 5 | |
| FLG Off Current | IFOH | 0.01 | 1 | µA | VFLG = 5V | 5 | |
| FLG Blanking Time | tBLANK | 2 | 7 | 20 | ms | Assertion or Deassertion due to Overvoltage, Overcurrent, and Overtemperature Condition | 5 |
| Output OVP Lockout (VOUT rising threshold) | VOV_TRIP | 5.5 | 5.7 | 5.9 | V | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 Weight: 0.013 grams (Approximate) | 16 |
CAD (KiCad official)
- Symbol:
AP22815AWT-7 - Footprint:
Package_TO_SOT_SMD:TSOT-23-5 - 3D model: TSOT-25 (KiCad packages3D, STEP)
- 3D model files:
ap22815awt-7-etched.step/ap22815awt-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap22815awt-7.step/ap22815awt-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (17 pp, sha256
e5c6ff18574ccae8, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AP22815AWT-7
**Diodes Incorporated** · Power Distribution Switches · TSOT-25
AP22815AWT-7 from Diodes Incorporated, in a TSOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Voltage output of the power switch, with a recommended VOUT range of 0 to 23 V and an absolute maximum of -0.3 to 28 V (VOUT to GND or VIN); the pin integrates output discharge circuitry. |
| 2 | GND | power_in | Ground pin of the circuitry. |
| 3 | FLG | output | Open-drain overcurrent and overtemperature fault flag, active low when triggered, asserted after a 7 ms typical deglitch (blanking) time, with a rated FLG off current of 1 µA maximum at VFLG = 5 V. |
| 4 | EN | input | Enable input; the AP22815AWT-7 is the Active-High option per the ordering information, with VIH of at least 1.2 V and VIL of no higher than 0.4 V, and it should not be left floating. |
| 5 | IN | power_in | Voltage input pin, with an operating range of 3.0 V to 5.5 V and an absolute maximum of -0.3 to 6.0 V; a 1 µF X7R or X5R ceramic bypass capacitor is required between IN and GND close to the device. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSOT-25 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 3 | | 5.5 | V | | 4 |
| Output Current | IOUT | 0 | | 3 | A | 4.0V ≤ VIN ≤ 5.5V | 4 |
| Output Current | IOUT | 0 | | 1.5 | A | 3.0V ≤ VIN < 4.0V | 4 |
| EN Input Logic Low Voltage | VIL | 0 | | 0.4 | V | | 4 |
| Output Voltage | VOUT | 0 | | 23 | V | | 4 |
| EN Input Logic High Voltage | VIH | 1.2 | | | V | | 4 |
| Operating Ambient Temperature | TA | -40 | | 85 | C | | 4 |
| ESD Human Body Model | ESD HBM | | | 2000 | V | Ratings at TA = +25°C | 4 |
| ESD Machine Model | ESD MM | | | 200 | V | Ratings at TA = +25°C | 4 |
| Input Voltage | VIN | -0.3 | | 6 | V | Ratings at TA = +25°C | 4 |
| Output Voltage | VOUT | -0.3 | | 28 | V | VOUT to GND, VOUT to VIN | 4 |
| Enable Voltage | VEN | -0.3 | | | V | Printed maximum is (VIN +0.3) | 4 |
| Maximum Junction Temperature | TJ(max) | | | 150 | °C | | 4 |
| Storage Temperature | TSTG | -65 | | 150 | °C | | 4 |
| Thermal Resistance, Junction to Ambient (TSOT25) | RΘJA | | 85 | | °C/W | Note 6: TA = +25°C, four-layer high thermal conductivity board per JEDEC 51-7 | 4 |
| Thermal Resistance, Junction to Case (TSOT25) | RΘJC | | 32 | | °C/W | Note 6: TA = +25°C, four-layer high thermal conductivity board per JEDEC 51-7 | 4 |
| Input UVLO (VIN rising) | VUVLO | 2.1 | 2.5 | 2.9 | V | VIN Rising | 5 |
| Input Shutdown Current | ISHDN | | 0.1 | 10 | µA | Disabled, OUT = Open (Discharge Current Included) | 5 |
| Input Leakage Current | ILEAK | | 0.1 | 1 | µA | Disabled, OUT Grounded | 5 |
| Reverse Leakage Current | IREV | | 0.5 | 15 | µA | Disabled, VIN = 0V, VOUT = 5V, IREV at OUT | 5 |
| Reverse Leakage Current | IREV | | 0.5 | 30 | µA | Disabled, VIN = 0V, VOUT = 20V, IREV at OUT | 5 |
| Switch On-Resistance (AP22815) | RDS(ON) | | 40 | 50 | mΩ | VIN = 5.0V, IOUT = 1A | 5 |
| Overload Current Limit (AP22815) | ILIMIT | 3.1 | 3.6 | 4.2 | A | VIN = 5V, VOUT = 4V | 5 |
| EN Input Logic Low Voltage | VIL | | | 0.4 | V | VIN = 5V | 5 |
| EN Input Logic High Voltage | VIH | 1.2 | | | V | VIN = 5V | 5 |
| EN Input Leakage | ILEAK-EN | | 1 | 2 | µA | VIN = 5V, VEN = 0V and 5.5V | 5 |
| Output Leakage Current | ILEAK-O | | 0.5 | 1 | µA | Disabled, VOUT = 0V | 5 |
| Output Turn-On Rise Time | tR | 1 | 1.9 | 3.5 | ms | CL = 10µF, RLOAD = 10Ω @ VIN = 5V (Figure 1) | 5 |
| FLG Output FET On-Resistance | RFLG | | 40 | 60 | Ω | IFLG = 10mA | 5 |
| FLG Off Current | IFOH | | 0.01 | 1 | µA | VFLG = 5V | 5 |
| FLG Blanking Time | tBLANK | 2 | 7 | 20 | ms | Assertion or Deassertion due to Overvoltage, Overcurrent, and Overtemperature Condition | 5 |
| Output OVP Lockout (VOUT rising threshold) | VOV_TRIP | 5.5 | 5.7 | 5.9 | V | | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 Weight: 0.013 grams (Approximate) | 16 |
## CAD (KiCad official)
- Symbol: `AP22815AWT-7`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-5`
- 3D model: TSOT-25 (KiCad packages3D, STEP)
- 3D model files: `ap22815awt-7-etched.step` / `ap22815awt-7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ap22815awt-7.step` / `ap22815awt-7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8560085623701856256) (17 pp, sha256 `e5c6ff18574ccae8`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ap22815awt-7-datasheet.pdf)