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page.json: drop the phantom "PAD" pin. The datasheet package drawing is a 6-lead SOT-26 with 6 pads and no thermal pad, matching the shipped footprint exactly, so there is no exposed pad for this entry to describe and no symbol pin could ever resolve to it. Removed rather than "fixed" by adding a pad: putting copper under a part whose die has no thermal path would be the real defect.

Ray ·f1d739ce14 ·1mo ago ·parent e006137
2 files changed +2−15
pads.json+1−8
@@ -27,14 +27,7 @@   "6"  ],  "paste_apertures": 0,- "issues": [-  {-   "kind": "pin-not-in-symbol",-   "pin": "PAD",-   "name": "EP",-   "detail": "page.json describes pin \"PAD\" (EP) from the datasheet, but the symbol has no such pin, so nothing can connect to it"-  }- ],+ "issues": [],  "pads": [   {    "pad": "1",
page.json+1−7
@@ -15,7 +15,7 @@     "mpn": "AP22652W6-7",     "manufacturer": "Diodes Incorporated",     "package": "SOT-26",-    "pin_count": 7,+    "pin_count": 6,     "category": "PMIC",     "subcategory": "AC-DC Controllers and Regulators",     "datasheet": "https://www.diodes.com/assets/Datasheets/AP22652W6-7.pdf",@@ -65,12 +65,6 @@         "name": "IN",         "type": "power_in",         "description": "Input supply (3.0 V to 5.5 V). Connect a 0.1 uF or greater ceramic decoupling capacitor from IN to GND as close to the IC as possible. Absolute max 6.0 V."-      },-      {-        "number": "PAD",-        "name": "EP",-        "type": "power_in",-        "description": "Exposed thermal pad. Internal connection to GND; must be soldered to a GND copper pour externally for improved power dissipation. Not to be used as an electrical ground conduction path."       }     ],     "provenance": {