AP2213M-3.3TRG1 from Diodes Incorporated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	EN	input	Enable input is CMOS or TTL compatible, with logic high enabling the regulator and logic low placing it in shutdown; the recommended enable voltage range is 0 to 18 V.
2	VIN	power_in	Supply input voltage, with a recommended range of 2.5 V to 18 V and an absolute maximum of 20 V.
3	VOUT	power_out	Regulated 500 mA fixed output voltage (3.3 V for this version).
4	BYP	passive	Bypass capacitor connection for low-noise operation; the datasheet recommends no more than 100pF from BYP to GND.
5	GND	power_in	Ground connection, one of four GND pins (5 to 8) that are internally common.
6	GND	power_in	Ground connection, one of four GND pins (5 to 8) that are internally common.
7	GND	power_in	Ground connection, one of four GND pins (5 to 8) that are internally common.
8	GND	power_in	Ground connection, one of four GND pins (5 to 8) that are internally common.

Key specifications

Parameter	Value
Manufacturer	Diodes Incorporated
Package	SOIC-8
Category	Power Supply Chip
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply Input Voltage	VIN	2.5		18	V		3
Enable Input Voltage	VEN	0		18	V		3
Operating Junction Temperature	TJ	-40		125	°C		3
Supply Input Voltage	VIN			20	V		3
Enable Input Voltage	VEN			20	V		3
Lead Temperature (Soldering, 10s)	TLEAD			260	°C		3
Junction Temperature	TJ			150	°C		3
Storage Temperature	TSTG	-65		150	°C		3
ESD (Machine Model)	ESD			300	V		3
ESD (Human Body Model)	ESD			6000	V		3
ESD (Charge Device Model)	ESD			2000	V		3
Output Voltage Accuracy	∆VOUT/VOUT	-1		1	%	Variation from Specified VOUT	8
Output Voltage Accuracy	∆VOUT/VOUT	-2		2	%	Variation from Specified VOUT	8
Line Regulation	VRLINE		1.5	4.5	mV	VIN = 4.3V to 13.2V	8
Line Regulation	VRLINE			12	mV	VIN = 4.3V to 13.2V	8
Load Regulation	VRLOAD		1	9	mV	IOUT = 0.1mA to 500mA	8
Load Regulation	VRLOAD			18	mV	IOUT = 0.1mA to 500mA	8
Dropout Voltage	VDROP		15	50	mV	IOUT = 100µA	8
Dropout Voltage	VDROP			70	mV	IOUT = 100µA	8
Dropout Voltage	VDROP		110	150	mV	IOUT = 50mA	8
Dropout Voltage	VDROP			230	mV	IOUT = 50mA	8
Dropout Voltage	VDROP		140	250	mV	IOUT = 100mA	8
Dropout Voltage	VDROP			300	mV	IOUT = 100mA	8
Dropout Voltage	VDROP		165	275	mV	IOUT = 150mA	8
Dropout Voltage	VDROP			350	mV	IOUT = 150mA	8
Dropout Voltage	VDROP		250	400	mV	IOUT = 300mA	8
Dropout Voltage	VDROP			500	mV	IOUT = 300mA	8
Dropout Voltage	VDROP		350	600	mV	IOUT = 500mA	8
Dropout Voltage	VDROP			700	mV	IOUT = 500mA	8
Standby Current	ISTD		0.01	1	µA	VEN ≤ 0.4V (Shutdown)	8
Standby Current	ISTD			5	µA	VEN ≤ 0.18V (Shutdown)	8
Ground Pin Current	IGND		100	150	µA	VEN ≥ 2.0V, IOUT = 100µA	8
Ground Pin Current	IGND			180	µA	VEN ≥ 2.0V, IOUT = 100µA	8
Ground Pin Current	IGND		350	600	µA	VEN ≥ 2.0V, IOUT = 50mA	8
Ground Pin Current	IGND			800	µA	VEN ≥ 2.0V, IOUT = 50mA	8
Ground Pin Current	IGND		1.3	1.9	mA	VEN ≥ 2.0V, IOUT = 150mA	8
Ground Pin Current	IGND			2.5	mA	VEN ≥ 2.0V, IOUT = 150mA	8
Ground Pin Current	IGND		4	10	mA	VEN ≥ 2.0V, IOUT = 300mA	8
Ground Pin Current	IGND			15	mA	VEN ≥ 2.0V, IOUT = 300mA	8
Ground Pin Current	IGND		11	20	mA	VEN ≥ 2.0V, IOUT = 500mA	8
Ground Pin Current	IGND			28	mA	VEN ≥ 2.0V, IOUT = 500mA	8
Enable Input Logic-Low Voltage	VIL			0.4	V	Regulator Shutdown	9
Enable Input Logic-Low Voltage	VIL			0.18	V	Regulator Shutdown	9
Enable Input Logic-High Voltage	VIH	2			V	Regulator Enabled	9
Enable Input Logic-Low Current	IIL		0.01	1	µA	VIL ≤ 0.4V	9
Enable Input Logic-Low Current	IIL			2	µA	VIL ≤ 0.18V	9
Enable Input Logic-High Current	IIH		5	20	µA	VIH ≥ 2.0V	9
Enable Input Logic-High Current	IIH			25	µA	VIH ≥ 2.0V	9
Current Limit	ILIMIT		700	1000	mA	VOUT = 0V	9
Ripple Rejection	PSRR		75		dB	f = 100Hz, IOUT = 100µA	9
Output Noise	eno		260		nV / Hz	IOUT = 50mA, COUT = 2.2µF, 100pF from BYP to GND	9
Output Voltage Temperature Coefficient	∆VOUT/∆T		120		µV/°C		8
Output Voltage Temperature Coefficient	(∆VOUT/VOUT)/∆T		36.3		ppm/°C		8
Thermal Resistance Junction-to-Case (SOIC-8)	θJC		45		°C/W		9
Thermal Resistance Junction-to-Ambient (SOIC-8, no heatsink)	θJA		160		°C/W	No heatsink	3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts		tin	• Terminals: Finish, Matte Tin Plated Leads, Solderable per MILSTD-202, Method 208 • Weight:	1

CAD (KiCad official)

Symbol: AP2213M-3.3TRG1
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: ap2213m-3-3trg1-etched.step / ap2213m-3-3trg1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap2213m-3-3trg1.step / ap2213m-3-3trg1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Diodes Incorporated datasheet (22 pp, sha256 72c88d1b7e8742d7, retrieved 2026-11-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AP2213M-3.3TRG1

Verified AP2213M-3.3TRG1

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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