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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ap2210n-5-0trg1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
ap2210n-5-0trg1-etched.fit.json ap2210n-5-0trg1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ap2210n-5-0trg1-etched.glb ap2210n-5-0trg1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ap2210n-5-0trg1-etched.step ap2210n-5-0trg1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ap2210n-5-0trg1.glb Publish 0.1.0 · Ray 1mo ago
ap2210n-5-0trg1.kicad_mod fix footprint: SOT-23 -> SOT-23-5 (symbol has pins 1,2,3,4,5; the old footprint left pad(s) with no net) · Ray 1mo ago
ap2210n-5-0trg1.kicad_sym Publish 0.1.0 · Ray 1mo ago
ap2210n-5-0trg1.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 5 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
ap2210n-5-0trg1.step Publish 0.1.0 · Ray 1mo ago
package.json ap2210n-5-0trg1: manufacturer 'Diodes Incorporated' (was 'Diodes Incorporated AP2210N 5 0TRG1': the MPN had been folded in) · Ray 18d ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 12d ago
README.md ap2210n-5-0trg1: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 18d ago

AP2210N-5.0TRG1

Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23

AP2210N-5.0TRG1 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Supply input voltage. Recommended operating range 2.5V to 13.2V (abs max 15V). Bypass to GND with a 1.0µF ceramic capacitor close to the pin.
2 GND power_in Device ground reference. Return path for both quiescent (ground pin current, typ 100µA at IOUT=100µA) and load current return through the input/output capacitors.
3 EN input Enable input, CMOS/TTL compatible. Logic high (VIH ≥ 2.0V) enables the regulator; logic low (VIL ≤ 0.4V, shutdown at ≤0.18V) forces shutdown (ISTD ≤ 1µA). Abs max VEN = 15V.
4 BYP passive Bypass pin for low-noise operation on the fixed-output (5.0V) version. Connect a ~100pF ceramic capacitor from BYP to GND to reduce reference noise. On the ADJ variant this pin is the feedback ADJ input instead; on this fixed 5.0V part it is the BYP node.
5 VOUT power_out Regulated 5.0V output, up to 300mA. Requires a 2.2µF ceramic output capacitor to GND for stability. Line/load regulation typ 1.5mV/1mV; dropout typ 250mV at 300mA.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-23
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • AP2210N-5.0TRG1

CAD (KiCad official)

  • Symbol: AP2210N-5.0TRG1
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: ap2210n-5-0trg1-etched.step / ap2210n-5-0trg1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap2210n-5-0trg1.step / ap2210n-5-0trg1.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ap2210n-5-0trg1.step 59 KB You want the bare part, or you mark your own boards.
ap2210n-5-0trg1-etched.step 2.3 MB You want the part with AP2210N-5.0TRG1 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 561 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (30 pp, sha256 8d83ef61593fff5e, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF