AP2210N-4.0TRG1
Public Made by Adomby adom
Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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| ap2210n-4-0trg1-etched.glb | 17d ago |
| ap2210n-4-0trg1-etched.step | 17d ago |
| ap2210n-4-0trg1-hero.glb | 17d ago |
| ap2210n-4-0trg1-hero.overlay.json | 17d ago |
| ap2210n-4-0trg1.glb | 17d ago |
| ap2210n-4-0trg1.kicad_mod | 17d ago |
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| README.md | 17d ago |
AP2210N-4.0TRG1
Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3
AP2210N-4.0TRG1 from Diodes Incorporated, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the regulator (pin 1 on SOT-23-3, pin 2 on SOT-23-5). |
| 2 | VOUT | power_out | Regulated output voltage; an output capacitor of at least 1.0µF is required to prevent oscillation when CBYP is unused. |
| 3 | VIN | power_in | Input voltage; the recommended input range is VOUT+1V to 13.2V, with a 1µF minimum input capacitor between VIN and GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage Accuracy | ∆VOUT/VOUT | -1 | 1 | % | Variation from specified VOUT | 15 | |
| Output Voltage Accuracy | ∆VOUT/VOUT | -2 | 2 | % | Variation from specified VOUT | 15 | |
| Output Voltage Temperature Coefficient | ∆VOUT/∆T | 120 | µV/°C | 15 | |||
| Output Voltage Temperature Coefficient | (∆VOUT/VOUT)/∆T | 48 | ppm/°C | 15 | |||
| Line Regulation | VRLINE | 1.5 | 4.5 | mV | VIN = 5.0V to 13.2V | 15 | |
| Line Regulation | VRLINE | 12 | mV | VIN = 5.0V to 13.2V | 15 | ||
| Load Regulation | VRLOAD | 1 | 6 | mV | IOUT = 0.1mA to 300mA | 15 | |
| Load Regulation | VRLOAD | 30 | mV | IOUT = 0.1mA to 300mA | 15 | ||
| Dropout Voltage | VDROP | 15 | 50 | mV | IOUT = 100µA | 15 | |
| Dropout Voltage | VDROP | 70 | mV | IOUT = 100µA | 15 | ||
| Dropout Voltage | VDROP | 110 | 150 | mV | IOUT = 50mA | 15 | |
| Dropout Voltage | VDROP | 230 | mV | IOUT = 50mA | 15 | ||
| Dropout Voltage | VDROP | 140 | 250 | mV | IOUT = 100mA | 15 | |
| Dropout Voltage | VDROP | 300 | mV | IOUT = 100mA | 15 | ||
| Dropout Voltage | VDROP | 165 | 275 | mV | IOUT = 150mA | 15 | |
| Dropout Voltage | VDROP | 350 | mV | IOUT = 150mA | 15 | ||
| Dropout Voltage | VDROP | 250 | 400 | mV | IOUT = 300mA | 15 | |
| Dropout Voltage | VDROP | 500 | mV | IOUT = 300mA | 15 | ||
| Standby Current | ISTD | 0.01 | 1 | µA | VEN ≤ 0.4V (shutdown) | 15 | |
| Standby Current | ISTD | 5 | µA | VEN ≤ 0.18V (shutdown) | 15 | ||
| Ground Pin Current | IGND | 100 | 150 | µA | VEN ≥ 2.0V, IOUT = 100µA | 15 | |
| Ground Pin Current | IGND | 180 | µA | VEN ≥ 2.0V, IOUT = 100µA | 15 | ||
| Ground Pin Current | IGND | 350 | 600 | µA | VEN ≥ 2.0V, IOUT = 50mA | 15 | |
| Ground Pin Current | IGND | 800 | µA | VEN ≥ 2.0V, IOUT = 50mA | 15 | ||
| Ground Pin Current | IGND | 1.3 | 1.9 | mA | VEN ≥ 2.0V, IOUT = 150mA | 15 | |
| Ground Pin Current | IGND | 2.5 | mA | VEN ≥ 2.0V, IOUT = 150mA | 15 | ||
| Ground Pin Current | IGND | 4 | 10 | mA | VEN ≥ 2.0V, IOUT = 300mA | 15 | |
| Ground Pin Current | IGND | 15 | mA | VEN ≥ 2.0V, IOUT = 300mA | 15 | ||
| Current Limit | ILIMIT | 450 | 900 | mA | VOUT = 0V | 15 | |
| Enable Input Logic-low Voltage | VIL | 0.4 | V | Regulator shutdown | 16 | ||
| Enable Input Logic-low Voltage | VIL | 0.18 | V | Regulator shutdown | 16 | ||
| Enable Input Logic-high Voltage | VIH | 2 | V | Regulator enabled | 16 | ||
| Enable Input Logic-low Current | IIL | 0.01 | 1 | µA | VIL ≤ 0.4V | 16 | |
| Enable Input Logic-low Current | IIL | 2 | µA | VIL ≤ 0.18V | 16 | ||
| Enable Input Logic-high Current | IIH | 5 | 20 | µA | VIL ≥ 2.0V | 16 | |
| Enable Input Logic-high Current | IIH | 25 | µA | VIL ≥ 2.0V | 16 | ||
| Supply Input Voltage | VIN | 2.5 | 13.2 | V | 4 | ||
| Enable Input Voltage | VEN | 0 | 13.2 | V | 4 | ||
| Operating Junction Temperature | TJ | -40 | 125 | °C | 4 | ||
| Supply Input Voltage | VIN | 15 | V | 4 | |||
| Enable Input Voltage | VEN | 15 | V | 4 | |||
| Lead Temperature (Soldering) | TLEAD | 260 | °C | 10sec | 4 | ||
| Junction Temperature | TJ | 150 | °C | 4 | |||
| Storage Temperature | TSTG | -65 | 150 | °C | 4 | ||
| ESD (Machine Model) | ESD | 300 | V | Machine Model | 4 | ||
| Thermal Resistance, Junction to Ambient (SOT-23-3) | θJA | 200 | °C/W | No Heatsink | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | • Terminals: SOT-23-3/SOT-23-5 Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
AP2210N-4.0TRG1 - Footprint:
Package_TO_SOT_SMD:SOT-23-3 - 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files:
ap2210n-4-0trg1-etched.step/ap2210n-4-0trg1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap2210n-4-0trg1.step/ap2210n-4-0trg1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (30 pp, sha256
8d83ef61593fff5e, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).