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AP2210K-3.3TRG1

Public Made by Adom

by adom

Diodes Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ap2210k-3-3trg1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
ap2210k-3-3trg1-etched.fit.json ap2210k-3-3trg1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ap2210k-3-3trg1-etched.glb ap2210k-3-3trg1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ap2210k-3-3trg1-etched.step ap2210k-3-3trg1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ap2210k-3-3trg1.glb Publish 0.1.0 · Ray 1mo ago
ap2210k-3-3trg1.kicad_mod Publish 0.1.0 · Ray 1mo ago
ap2210k-3-3trg1.kicad_sym Publish 0.1.0 · Ray 1mo ago
ap2210k-3-3trg1.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 5 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
ap2210k-3-3trg1.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 12d ago
README.md ap2210k-3-3trg1: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 18d ago

AP2210K-3.3TRG1

Diodes · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

AP2210K-3.3TRG1 from Diodes, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Unregulated supply input. Recommended operating range 4.3V (VOUT+1V) to 13.2V for the 3.3V version; absolute maximum 15V. Bypass with a 1.0µF ceramic capacitor (CIN) to GND close to the pin.
2 GND power_in Device ground return. Carries the ground-pin quiescent current (typ. 100µA at IOUT=100µA, up to ~4mA at IOUT=300mA). Connect to the system ground plane.
3 EN input Enable input, CMOS/TTL compatible. Logic high (VEN ≥ 2.0V) enables the regulator; logic low (VEN ≤ 0.4V) puts the device in shutdown (ISTD ≤ 1µA). Absolute maximum VEN = 15V; recommended 0 to 13.2V. May be tied to VIN for always-on operation.
4 BYP passive Bypass capacitor pin for low-noise operation on the fixed-output (3.3V) version. Connect a small ceramic capacitor (typ. 100pF, CBYP) from BYP to GND to filter the internal bandgap reference and reduce output noise. On the ADJ variant this same pin is repurposed as the ADJ feedback input.
5 VOUT power_out Regulated 3.3V output, up to 300mA. Accuracy ±1% (typ), ±2% over full temperature. Requires a 2.2µF ceramic output capacitor (COUT) to GND for stability. Internally current-limited (~450mA typ) and thermally protected.

Key specifications

Parameter Value
Manufacturer Diodes
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • AP2210K-3.3TRG1
  • AP2210K-3.3TRG1K
  • AP2210K-3.3TRG1N

CAD (KiCad official)

  • Symbol: AP2210K-3.3TRG1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: ap2210k-3-3trg1-etched.step / ap2210k-3-3trg1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap2210k-3-3trg1.step / ap2210k-3-3trg1.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ap2210k-3-3trg1.step 85 KB You want the bare part, or you mark your own boards.
ap2210k-3-3trg1-etched.step 2.5 MB You want the part with AP2210K-3.3TRG1 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 619 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes datasheet (30 pp, sha256 8d83ef61593fff5e, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF