component
AP2210K-3.0TRG1
Public Made by Adomby adom
Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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AP2210K-3.0TRG1
Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
AP2210K-3.0TRG1 from Diodes Incorporated, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply input; the Recommended Operating Conditions give 2.5 V to 13.2 V, with an absolute maximum of 15 V, and a 1 µF minimum input capacitor between VIN and GND is recommended. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | EN | input | CMOS or TTL compatible enable input where logic high enables the regulator and logic low shuts it down, with VEN rated 0 V to 13.2 V. |
| 4 | BYP/ADJ | passive | Bypass capacitor connection for low-noise operation, where no more than 100 pF is recommended, or the adjustable output feedback node on the ADJ version; leaving it open gives faster start-up. |
| 5 | VOUT | power_out | Regulated output voltage, which requires an output capacitor of at least 1.0 µF (2.2 µF when CBYP is 100 pF) to prevent oscillation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Input Voltage (recommended) | VIN | 2.5 | 13.2 | V | 4 | ||
| Enable Input Voltage (recommended) | VEN | 0 | 13.2 | V | 4 | ||
| Operating Junction Temperature | TJ | -40 | 125 | °C | 4 | ||
| Supply Input Voltage (absolute maximum) | VIN | 15 | V | 4 | |||
| Enable Input Voltage (absolute maximum) | VEN | 15 | V | 4 | |||
| Lead Temperature (soldering) | TLEAD | 260 | °C | Soldering, 10 sec | 4 | ||
| Junction Temperature (absolute maximum) | TJ | 150 | °C | 4 | |||
| Storage Temperature | TSTG | -65 | 150 | °C | 4 | ||
| ESD | ESD | 300 | V | Machine Model | 4 | ||
| Thermal Resistance Junction-to-Ambient (no heatsink) | θJA | 200 | °C/W | No heatsink, SOT-23-5 | 4 | ||
| Output Voltage Accuracy | ∆VOUT/VOUT | -1 | 1 | % | Variation from specified VOUT, TJ = +25°C | 9 | |
| Output Voltage Accuracy (over temperature) | ∆VOUT/VOUT | -2 | 2 | % | Variation from specified VOUT, -40°C ≤ TJ ≤ +125°C (bold) | 9 | |
| Output Voltage Temperature Coefficient | ∆VOUT/∆T | 120 | µV/°C | 9 | |||
| Output Voltage Temperature Coefficient (ratio) | (∆VOUT/VOUT)/∆T | 40 | ppm/°C | 9 | |||
| Line Regulation | VRLINE | 1.5 | 4.5 | mV | VIN = 4V to 13.2V, TJ = +25°C | 9 | |
| Line Regulation (over temperature) | VRLINE | 12 | mV | VIN = 4V to 13.2V, -40°C ≤ TJ ≤ +125°C (bold) | 9 | ||
| Load Regulation | VRLOAD | 1 | 6 | mV | IOUT = 0.1mA to 300mA, TJ = +25°C | 9 | |
| Load Regulation (over temperature) | VRLOAD | 30 | mV | IOUT = 0.1mA to 300mA, -40°C ≤ TJ ≤ +125°C (bold) | 9 | ||
| Dropout Voltage | VDROP | 15 | 50 | mV | IOUT = 100µA, TJ = +25°C | 9 | |
| Dropout Voltage (over temperature) | VDROP | 70 | mV | IOUT = 100µA, -40°C ≤ TJ ≤ +125°C (bold) | 9 | ||
| Dropout Voltage | VDROP | 110 | 150 | mV | IOUT = 50mA, TJ = +25°C | 9 | |
| Dropout Voltage (over temperature) | VDROP | 230 | mV | IOUT = 50mA, -40°C ≤ TJ ≤ +125°C (bold) | 9 | ||
| Dropout Voltage | VDROP | 140 | 250 | mV | IOUT = 100mA, TJ = +25°C | 9 | |
| Dropout Voltage (over temperature) | VDROP | 300 | mV | IOUT = 100mA, -40°C ≤ TJ ≤ +125°C (bold) | 9 | ||
| Dropout Voltage | VDROP | 165 | 275 | mV | IOUT = 150mA, TJ = +25°C | 9 | |
| Dropout Voltage (over temperature) | VDROP | 350 | mV | IOUT = 150mA, -40°C ≤ TJ ≤ +125°C (bold) | 9 | ||
| Dropout Voltage | VDROP | 250 | 400 | mV | IOUT = 300mA, TJ = +25°C | 9 | |
| Dropout Voltage (over temperature) | VDROP | 500 | mV | IOUT = 300mA, -40°C ≤ TJ ≤ +125°C (bold) | 9 | ||
| Standby Current | ISTD | 0.01 | 1 | µA | VEN ≤ 0.4V (shutdown) | 9 | |
| Standby Current | ISTD | 5 | µA | VEN ≤ 0.18V (shutdown) | 9 | ||
| Ground Pin Current | IGND | 100 | 150 | µA | VEN ≥ 2.0V, IOUT = 100µA, TJ = +25°C | 9 | |
| Ground Pin Current (over temperature) | IGND | 180 | µA | VEN ≥ 2.0V, IOUT = 100µA, -40°C ≤ TJ ≤ +125°C (bold) | 9 | ||
| Ground Pin Current | IGND | 350 | 600 | µA | VEN ≥ 2.0V, IOUT = 50mA, TJ = +25°C | 9 | |
| Ground Pin Current (over temperature) | IGND | 800 | µA | VEN ≥ 2.0V, IOUT = 50mA, -40°C ≤ TJ ≤ +125°C (bold) | 9 | ||
| Ground Pin Current | IGND | 1.3 | 1.9 | mA | VEN ≥ 2.0V, IOUT = 150mA, TJ = +25°C | 9 | |
| Ground Pin Current (over temperature) | IGND | 2.5 | mA | VEN ≥ 2.0V, IOUT = 150mA, -40°C ≤ TJ ≤ +125°C (bold) | 9 | ||
| Ground Pin Current | IGND | 4 | 10 | mA | VEN ≥ 2.0V, IOUT = 300mA, TJ = +25°C | 9 | |
| Ground Pin Current (over temperature) | IGND | 15 | mA | VEN ≥ 2.0V, IOUT = 300mA, -40°C ≤ TJ ≤ +125°C (bold) | 9 | ||
| Current Limit | ILIMIT | 450 | 900 | mA | VOUT = 0V | 9 | |
| Enable Input Logic-low Voltage | VIL | 0.4 | V | Regulator shutdown, TJ = +25°C | 10 | ||
| Enable Input Logic-low Voltage (over temperature) | VIL | 0.18 | V | Regulator shutdown, -40°C ≤ TJ ≤ +125°C (bold) | 10 | ||
| Enable Input Logic-high Voltage | VIH | 2 | V | Regulator enabled | 10 | ||
| Enable Input Logic-low Current | IIL | 0.01 | 1 | µA | VIL ≤ 0.4V | 10 | |
| Enable Input Logic-low Current (over temperature) | IIL | 2 | µA | VIL ≤ 0.18V | 10 | ||
| Enable Input Logic-high Current | IIH | 5 | 20 | µA | VIL ≥ 2.0V, TJ = +25°C | 10 | |
| Enable Input Logic-high Current (over temperature) | IIH | 25 | µA | VIL ≥ 2.0V, -40°C ≤ TJ ≤ +125°C (bold) | 10 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | • Terminals: SOT-23-3/SOT-23-5 Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
AP2210K-3.0TRG1 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
ap2210k-3-0trg1-etched.step/ap2210k-3-0trg1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap2210k-3-0trg1.step/ap2210k-3-0trg1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (30 pp, sha256
8d83ef61593fff5e, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).