AP2202K-ADJTRG1

{
  "slug": "ap2202k-adjtrg1",
  "version": "0.1.0",
  "type": "component",
  "description": "Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "ap2202k-adjtrg1",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ap2202k-adjtrg1.kicad_sym",
    "ap2202k-adjtrg1.kicad_mod",
    "ap2202k-adjtrg1.glb",
    "ap2202k-adjtrg1.step",
    "ap2202k-adjtrg1.lbr",
    "docs/hero.png",
    "docs/ap2202k-adjtrg1-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ap2202k-adjtrg1-hero.glb",
    "ap2202k-adjtrg1-hero.overlay.json",
    "ap2202k-adjtrg1-etched.glb"
  ],
  "component": {
    "mpn": "AP2202K-ADJTRG1",
    "manufacturer": "Diodes Incorporated",
    "package": "SOT-23-5",
    "pin_count": 5,
    "category": "Power Management (PMIC)",
    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8560094616294096896",
    "parts": {
      "symbol": "ap2202k-adjtrg1.kicad_sym",
      "footprint": "ap2202k-adjtrg1.kicad_mod",
      "model_3d": "ap2202k-adjtrg1-hero.glb",
      "model_3d_plain": "ap2202k-adjtrg1-etched.glb",
      "model_3d_step": "ap2202k-adjtrg1-etched.step",
      "model_3d_step_plain": "ap2202k-adjtrg1.step",
      "lbr": "ap2202k-adjtrg1.lbr"
    },
    "distributor_links": {
      "lcsc": "C507873",
      "digikey": "AP2202K-ADJTRG1DITR-ND",
      "mouser": "621-AP2202K-ADJTRG1"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T01:07:13Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "AP2202K-ADJTRG1DITR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "621-AP2202K-ADJTRG1",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VIN",
        "type": "power_in",
        "description": "Input voltage pin; the recommended input is VOUT+0.5V to 13.2V, and VOUT+0.165V is the minimum input for a normal output voltage."
      },
      {
        "number": "2",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference pin for the regulator."
      },
      {
        "number": "3",
        "name": "EN",
        "type": "input",
        "description": "CMOS or TTL compatible enable input where logic high enables the regulator and logic low puts it into shutdown."
      },
      {
        "number": "4",
        "name": "BYP/ADJ",
        "type": "passive",
        "description": "On the ADJ version this pin is the output adjust input, with VOUT = 1.25 x (1 + R2/R1), and it can also take a bypass capacitor for low-noise operation (100pF to GND is suggested)."
      },
      {
        "number": "5",
        "name": "VOUT",
        "type": "power_out",
        "description": "Regulated output voltage; an output capacitor of at least 1.0µF is required to prevent oscillation (2.2µF minimum when a 100pF BYP capacitor is used)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet labels pin 4 as BYP/ADJ with no explicit electrical type. It is typed as passive here ; The 100pF bypass-capacitor guidance applies to the BYP function and the R1/R2 divider applies to ADJ"
        ],
        "pages_sent": 8,
        "cost_usd": 0.038,
        "at": "2026-10-18T01:05:29"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8560094616294096896",
        "pages": 26,
        "sha256": "ac902c499d16dc61",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 5,
        "described": 5,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.8,
          2.9,
          1.55
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "720a6eab0024069bbee68e7cb4c3ff1149468a34611225cdc852662c5d0ec2b7",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ap2202k-adjtrg1-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "1142d03d2a45f07675199be7417789502cbb1fb4332d68dde8beb647ec79f998",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}