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AP2202K-ADJTRE1

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Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AP2202K-ADJTRE1

Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

AP2202K-ADJTRE1 from Diodes Incorporated, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input voltage; the datasheet recommends VOUT+0.5V to 13.2V for the ADJ version.
2 GND power_in Ground pin for the SOT-23-5 package.
3 EN input Enable input, CMOS or TTL compatible: logic high enables the regulator and logic low puts it in shutdown.
4 ADJ input Adjust pin on the ADJ version (labelled BYP/ADJ in the pin table), used with an external divider R1/R2 to set VOUT=1.25*(1+R2/R1).
5 VOUT power_out Regulated output voltage.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Input Voltage (recommended) VIN 2.5 13.2 V 4
Enable Input Voltage (recommended) VEN 0 13.2 V 4
Operating Junction Temperature TJ -40 125 °C 4
Recommended minimum output voltage (ADJ version) 2.3 V ADJ version (Note 4) 2
Supply Input Voltage VIN 15 V 4
Enable Input Voltage VEN 15 V 4
Lead Temperature (Soldering) TLEAD 260 °C Soldering, 10sec 4
Junction Temperature TJ 150 °C 4
Storage Temperature TSTG -65 150 °C 4
ESD (Machine Model) 200 V 4
Thermal Resistance Junction-to-Ambient SOT-23-5 θJA 200 °C/W No Heatsink 4
Output Voltage Accuracy VOUT/VOUT -1 1 % Variation from Specified VOUT 5
Output Voltage Accuracy VOUT/VOUT -2 2 % Variation from Specified VOUT 5
Output Voltage Temperature Coefficient ∆VOUT/∆T 120 µV/°C 5
Line Regulation VRLINE 0.004 0.012 %/V VIN = VOUT +1V to 13.2V 5
Line Regulation VRLINE 0.05 %/V VIN = VOUT +1V to 13.2V 5
Load Regulation VRLOAD 0.02 0.2 % IOUT = 0.1mA to 150mA 5
Load Regulation VRLOAD 0.5 % IOUT = 0.1mA to 150mA 5
Dropout Voltage VDROP 15 50 mV IOUT = 100µA 5
Dropout Voltage VDROP 70 mV IOUT = 100µA 5
Dropout Voltage VDROP 110 150 mV IOUT = 50mA 5
Dropout Voltage VDROP 230 mV IOUT = 50mA 5
Dropout Voltage VDROP 140 250 mV IOUT = 100mA 5
Dropout Voltage VDROP 300 mV IOUT = 100mA 5
Dropout Voltage VDROP 165 275 mV IOUT = 150mA 5
Dropout Voltage VDROP 350 mV IOUT = 150mA 5
Standby Current ISTD 0.01 1 µA VEN ≤ 0.4V (Shutdown) 5
Standby Current ISTD 5 µA VEN ≤ 0.18V (Shutdown) 5
Ground Pin Current IGND 95 130 µA VEN ≥ 2.0V, IOUT = 0µA 5
Ground Pin Current IGND 150 µA VEN ≥ 2.0V, IOUT = 0µA 5
Ground Pin Current IGND 98 140 µA VEN ≥ 2.0V, IOUT = 100µA 5
Ground Pin Current IGND 160 µA VEN ≥ 2.0V, IOUT = 100µA 5
Ground Pin Current IGND 350 600 µA VEN ≥ 2.0V, IOUT = 50mA 5
Ground Pin Current IGND 800 µA VEN ≥ 2.0V, IOUT = 50mA 5
Ground Pin Current IGND 600 1000 µA VEN ≥ 2.0V, IOUT = 100mA 5
Ground Pin Current IGND 1500 µA VEN ≥ 2.0V, IOUT = 100mA 5
Ground Pin Current IGND 1300 1900 µA VEN ≥ 2.0V, IOUT = 150mA 5
Ground Pin Current IGND 2500 µA VEN ≥ 2.0V, IOUT = 150mA 5
Current Limit ILIMIT 320 550 mA VOUT = 0V 5
Enable Input Logic-Low Voltage VIL 0.4 V Regulator Shutdown 6
Enable Input Logic-Low Voltage VIL 0.18 V Regulator Shutdown 6
Enable Input Logic-High Voltage VIH 2 V Regulator Enabled 6
Enable Input Logic-Low Current IIL 0.01 1 µA VIL ≤ 0.4V 6
Enable Input Logic-Low Current IIL 2 µA VIL ≤ 0.18V 6
Enable Input Logic-High Current IIH 5 20 µA VIH ≥ 2.0V 6
Enable Input Logic-High Current IIH 25 µA VIH ≥ 2.0V 6
Power Supply Ripple Rejection PSRR 75 dB Frequency = 100Hz, IOUT = 100µA 5
Output Noise eno 260 nV / Hz IOUT = 50mA, COUT = 2.2µF, 100pF from BYP to GND 5
Thermal Resistance Junction-to-Case SOT-23-5 θJC 63.4 °C/W 6

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Terminals: SOT-23-5/SOT-89 Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208  Weight: 25

CAD (KiCad official)

  • Symbol: AP2202K-ADJTRE1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: ap2202k-adjtre1-etched.step / ap2202k-adjtre1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap2202k-adjtre1.step / ap2202k-adjtre1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (26 pp, sha256 ac902c499d16dc61, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF