component
AP2191DSG-13
Public Made by Adomby adom
Diodes Incorporated Power Distribution Switches, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAP2191DSG-13
Diodes Incorporated · Power Distribution Switches · SO-8
AP2191DSG-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; the device ground reference. |
| 2 | IN | power_in | Voltage input pin; all IN pins must be tied together externally, with an input range of 2.7V to 5.5V. |
| 3 | IN | power_in | Voltage input pin; all IN pins must be tied together externally, with an input range of 2.7V to 5.5V. |
| 4 | EN | input | Enable input, active high on AP2191D (active low on AP2181D); logic low maximum 0.8V and logic high minimum 2V. |
| 5 | FLG | output | Open-drain overcurrent and over-temperature fault flag, active low when triggered, with a 7ms typical deglitch before assertion. |
| 6 | OUT | power_out | Voltage output pin; all OUT pins must be tied together externally, with a recommended maximum continuous load current of 1.5A. |
| 7 | OUT | power_out | Voltage output pin; all OUT pins must be tied together externally, with a recommended maximum continuous load current of 1.5A. |
| 8 | NC | unconnected | No internal connection; the datasheet recommends tying this pin to the OUT pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 2.7 | 5.5 | V | 3 | ||
| Output Current | IOUT | 0 | 1.5 | A | 3 | ||
| EN Input Logic Low Voltage | VIL | 0 | 0.8 | V | 3 | ||
| EN Input Logic High Voltage | VIH | 2 | V | 3 | |||
| Operating Ambient Temperature | TA | -40 | 85 | °C | 3 | ||
| ESD Human Body Model | ESD HBM | 4 | kV | 3 | |||
| ESD Machine Model | ESD MM | 300 | V | 3 | |||
| Input Voltage | VIN | 6.5 | V | 3 | |||
| Enable Voltage | VEN, VFLG | 6.5 | V | 3 | |||
| Maximum Junction Temperature | TJMAX | 150 | °C | 3 | |||
| Storage Temperature Range | TST | -65 | 150 | °C | Note 4: UL-recognized rating -30°C to +70°C; Diodes-qualified -65°C to +150°C | 3 | |
| Input UVLO | VUVLO | 1.6 | 1.9 | 2.5 | V | 4 | |
| Input Shutdown Current | ISHDN | 0.5 | 1 | µA | Disabled, IOUT = 0 | 4 | |
| Input Quiescent Current | IQ | 45 | 70 | µA | Enabled, IOUT = 0 | 4 | |
| Input Leakage Current | ILEAK | 0.1 | 1 | µA | Disabled, OUT grounded | 4 | |
| Reverse Leakage Current | IREV | 0.1 | 1 | µA | Disabled, VIN = 0V, VOUT = 5V, IREV at VIN | 4 | |
| Switch On-Resistance (SO-8) | RDS(ON) | 95 | 115 | mΩ | VIN = 5V, IOUT = 1.5A, TA = +25°C | 4 | |
| Switch On-Resistance (SO-8) | RDS(ON) | 140 | mΩ | VIN = 5V, IOUT = 1.5A, -40°C ≤ TA ≤ +85°C | 4 | ||
| Switch On-Resistance (SO-8) | RDS(ON) | 120 | 140 | mΩ | VIN = 3.3V, IOUT = 1.5A, TA = +25°C | 4 | |
| Switch On-Resistance (SO-8) | RDS(ON) | 170 | mΩ | VIN = 3.3V, IOUT = 1.5A, -40°C ≤ TA ≤ +85°C | 4 | ||
| Over-Load Current Limit | ILIMIT | 1.6 | 2.1 | 2.6 | A | VIN = 5V, VOUT = 4V, CL = 120µF, -40°C ≤ TA ≤ +85°C | 4 |
| EN Input Logic Low Voltage | VIL | 0.8 | V | VIN = 2.7V to 5.5V | 4 | ||
| EN Input Logic High Voltage | VIH | 2 | V | VIN = 2.7V to 5.5V | 4 | ||
| EN Input Leakage | ISINK | 1 | µA | VEN = 5V | 4 | ||
| Output Turn-On Rise Time | TR | 0.6 | 1.5 | ms | CL = 1µF, RLOAD = 10Ω | 4 | |
| Output Turn-Off Fall Time | TF | 0.05 | 0.1 | ms | CL = 1µF, RLOAD = 10Ω | 4 | |
| FLG Output FET On-Resistance | RFLG | 20 | 40 | Ω | IFLG = 10mA | 4 | |
| FLG Blanking Time | TBlank | 4 | 7 | 15 | ms | CIN = 10uF, CL = 22F | 4 |
| Junction-to-Ambient Thermal Resistance (SO-8) | θJA | 127 | °C/W | Note 6: FR-4 substrate PCB, 2oz copper, minimum recommended pad layout | 4 |
CAD (KiCad official)
- Symbol:
AP2191DSG-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
ap2191dsg-13-etched.step/ap2191dsg-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap2191dsg-13.step/ap2191dsg-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (19 pp, sha256
aae8bd21019ec8a2, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).