# AP2181SG-13

**Diodes Incorporated** · Power Distribution Switches · SOP-8

AP2181SG-13 from Diodes Incorporated, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin for the device; the datasheet also specifies the exposed pad for the MSOP/U-DFN packages, but for SO-8 pin 1 is the only ground connection. |
| 2 | IN | power_in | Voltage input pin, which must be tied together externally with pin 3; the recommended input voltage is 2.7V to 5.5V with an absolute maximum of 6.5V. |
| 3 | IN | power_in | Voltage input pin, which must be tied together externally with pin 2; the recommended input voltage is 2.7V to 5.5V with an absolute maximum of 6.5V. |
| 4 | EN | input | Active-low enable input on the AP2181 (active-high on AP2191), with VIL maximum 0.8V and VIH minimum 2.0V, and absolute maximum voltage 6.5V. |
| 5 | FLG | output | Open-drain over-current and over-temperature fault report output that goes active low after a nominal 7 ms deglitch timeout, with absolute maximum voltage 6.5V. |
| 6 | OUT | power_out | Voltage output pin, which must be tied together externally with pin 7; the output voltage is limited to VIN + 0.3V absolute maximum. |
| 7 | OUT | power_out | Voltage output pin, which must be tied together externally with pin 6; the output voltage is limited to VIN + 0.3V absolute maximum. |
| 8 | NC | unconnected | No internal connection; the datasheet recommends tying this pin to the OUT pins. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input UVLO | VUVLO | 1.6 | 1.9 | 2.5 | V | RLOAD = 1kΩ | 4 |
| Input Quiescent Current | IQ |  | 45 | 70 | µA | Enabled, IOUT = 0 | 4 |
| Input Shutdown Current | ISHDN |  | 0.5 | 1 | µA | Disabled, IOUT = 0 | 4 |
| Input Leakage Current | ILEAK |  |  | 1 | µA | Disabled, OUT grounded | 4 |
| Switch On-Resistance (SO-8) | RDS(ON) |  | 95 | 115 | mΩ | VIN = 5V, IOUT = 1.5A, TA = +25°C | 4 |
| Switch On-Resistance (SO-8) | RDS(ON) |  |  | 140 | mΩ | VIN = 5V, IOUT = 1.5A, -40°C ≤ TA ≤ +85°C | 4 |
| Switch On-Resistance (SO-8) | RDS(ON) |  | 120 | 140 | mΩ | VIN = 3.3V, IOUT = 1.5A, TA = +25°C | 4 |
| Switch On-Resistance (SO-8) | RDS(ON) |  |  | 170 | mΩ | VIN = 3.3V, IOUT = 1.5A, -40°C ≤ TA ≤ +85°C | 4 |
| Over-Load Current Limit | ILIMIT | 1.6 | 2.1 | 2.6 | A | VIN = 5V, VOUT = 4.5V, CL = 120µF, -40°C ≤ TA ≤ +85°C | 4 |
| EN Input Logic Low Voltage | VIL |  |  | 0.8 | V | VIN = 2.7V to 5.5V | 4 |
| EN Input Logic High Voltage | VIH | 2 |  |  | V | VIN = 2.7V to 5.5V | 4 |
| EN Input Leakage | ISINK |  |  | 1 | µA | VEN = 5V | 4 |
| Output Turn-On Rise Time | TR |  | 0.6 | 1.5 | ms | CL = 1µF, RLOAD = 10Ω | 4 |
| Output Turn-Off Fall Time | TF |  | 0.05 | 0.1 | ms | CL = 1µF, RLOAD = 10Ω | 4 |
| FLG Output FET On-Resistance | RFLG |  | 20 | 40 | Ω | IFLG = 10mA, CL = 100µF | 4 |
| FLG Blanking Time | TBlank | 4 | 7 | 15 | ms | CIN = 10µF, CL = 100µF | 4 |
| Input Voltage | VIN | 2.7 |  | 5.5 | V |  | 3 |
| Output Current | IOUT | 0 |  | 1.5 | A |  | 3 |
| Operating Ambient Temperature | TA | -40 |  | 85 | °C |  | 3 |
| High-Level Input Voltage on EN or EN | VIH | 2 |  |  | V | Max printed as VIN | 3 |
| Low-Level Input Voltage on EN or EN | VIL | 0 |  | 0.8 | V |  | 3 |
| ESD HBM Protection | ESD HBM |  |  | 4 | kV | Human Body Model | 3 |
| ESD MM Protection (U-DFN2018-6, SO-8) | ESD MM |  |  | 300 | V | Machine Model, for U-DFN2018-6, SO-8 packages | 3 |
| Input Voltage | VIN |  |  | 6.5 | V |  | 3 |
| Enable and Flag Voltage | VEN, VFLG |  |  | 6.5 | V |  | 3 |
| Maximum Junction Temperature | TJ(MAX) |  |  | 150 | °C |  | 3 |
| Storage Temperature Range | TST | -65 |  | 150 | °C | Note 4: Diodes qualified range; UL recognized rating -30°C to +70°C | 3 |
| Thermal Resistance Junction-to-Ambient (SO-8) | θJA |  | 110 |  | °C/W | Note 5: device mounted on FR-4, 2oz copper, minimum recommended pad layout | 4 |

## CAD (KiCad official)

- Symbol: `AP2181SG-13`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `ap2181sg-13-etched.step` / `ap2181sg-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ap2181sg-13.step` / `ap2181sg-13.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590226512533626880) (17 pp, sha256 `79aae8cb1be7339c`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ap2181sg-13-datasheet.pdf)