component
AP2161SG-13
Public Made by Adomby adom
Diodes Incorporated AC-DC Controllers & Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
AP2161SG-13
Diodes Incorporated · AC-DC Controllers & Regulators · SOIC-8
AP2161SG-13 from Diodes Incorporated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin of the switch. |
| 2 | IN | power_in | Voltage input pin (2.7V to 5.5V operating range); all IN pins must be tied together externally. |
| 3 | IN | power_in | Voltage input pin (2.7V to 5.5V operating range); all IN pins must be tied together externally. |
| 4 | EN | input | Enable input, active low for AP2161 (AP2171 is active high); VIH min 2.0V, VIL max 0.8V. |
| 5 | FLG | output | Open-drain overcurrent and over-temperature fault flag, active low when triggered, with 7ms typical deglitch blanking time. |
| 6 | OUT | power_out | Voltage output pin with 1.5A typical current limit; all OUT pins must be tied together externally. |
| 7 | OUT | power_out | Voltage output pin with 1.5A typical current limit; all OUT pins must be tied together externally. |
| 8 | NC | unconnected | No internal connection; datasheet recommends tying it to the OUT pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 6.5 | V | 3 | |||
| Enable Voltage | VEN, VFLG | 6.5 | V | 3 | |||
| Maximum Junction Temperature | TJ(MAX) | 150 | °C | 3 | |||
| Storage Temperature Range | TST | -65 | 150 | °C | 3 | ||
| ESD HBM | ESD HBM | 4 | kV | Human Body Model | 3 | ||
| ESD MM (SO-8) | ESD MM | 300 | V | U-DFN2018-6, SO-8 packages | 3 | ||
| Input Voltage | VIN | 2.7 | 5.5 | V | 3 | ||
| Output Current | IOUT | 0 | 1 | A | 3 | ||
| Operating Ambient Temperature | TA | -40 | 85 | °C | 3 | ||
| High-Level Input Voltage on EN | VIH | 2 | V | max printed as VIN | 3 | ||
| Low-Level Input Voltage on EN | VIL | 0 | 0.8 | V | 3 | ||
| Input UVLO | VUVLO | 1.6 | 1.9 | 2.5 | V | RLOAD = 1kΩ | 4 |
| Input Shutdown Current | ISHDN | 0.5 | 1 | uA | Disabled, IOUT = 0 | 4 | |
| Input Quiescent Current | IQ | 45 | 70 | µA | Enabled, IOUT = 0 | 4 | |
| Input Leakage Current | ILEAK | 1 | µA | Disabled, OUT grounded | 4 | ||
| Reverse Leakage Current | IREV | 1 | µA | Disabled, VIN = 0V, VOUT = 5V, IREV at VIN | 4 | ||
| Switch on-resistance | RDS(ON) | 95 | 115 | mΩ | VIN = 5V, IOUT = 1A, TA = +25°C, SO-8 | 4 | |
| Switch on-resistance | RDS(ON) | 140 | mΩ | VIN = 5V, IOUT = 1A, -40°C ≤ TA ≤ +85°C | 4 | ||
| Switch on-resistance | RDS(ON) | 120 | 140 | mΩ | VIN = 3.3V, IOUT = 1A, TA = +25°C | 4 | |
| Switch on-resistance | RDS(ON) | 170 | mΩ | VIN = 3.3V, IOUT = 1A, -40°C ≤ TA ≤ +85°C | 4 | ||
| Short-Circuit Current Limit | ISHORT | 1.2 | A | Enabled into short circuit, CL = 68µF | 4 | ||
| Over-Load Current Limit | ILIMIT | 1.1 | 1.5 | 1.9 | A | VIN = 5V, VOUT = 4.6V, CL = 68µF, -40°C ≤ TA ≤ +85°C | 4 |
| Current limiting trigger threshold | ITrig | 2 | A | Output Current Slew rate (<100A/s), CL=68µF | 4 | ||
| EN Input leakage | ISINK | 1 | µA | VEN = 5V | 4 | ||
| Output turn-on delay time | tD(ON) | 0.05 | ms | CL = 1µF, RLOAD = 10Ω | 4 | ||
| Output turn-on rise time | tR | 0.6 | 1.5 | ms | CL = 1µF, RLOAD = 10Ω | 4 | |
| Output turn-off delay time | tD(OFF) | 0.01 | ms | CL = 1µF, RLOAD = 10Ω | 4 | ||
| Output turn-off fall time | tF | 0.05 | 0.1 | ms | CL = 1µF, RLOAD = 10Ω | 4 | |
| FLG output FET on-resistance | RFLG | 20 | 40 | Ω | IFLG = 10mA | 4 | |
| FLG blanking time | tBlank | 4 | 7 | 15 | ms | CIN = 10µF, CL = 68µF | 4 |
| Thermal Shutdown Threshold | TSHDN | 140 | C | Enabled, RLOAD = 1kΩ | 4 | ||
| Thermal Shutdown Hysteresis | THYS | 25 | C | 4 | |||
| Thermal Resistance Junction-to-Ambient | θJA | 110 | °C/W | SO-8 (Note 5) | 4 |
CAD (KiCad official)
- Symbol:
AP2161SG-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ap2161sg-13-etched.step/ap2161sg-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap2161sg-13.step/ap2161sg-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (18 pp, sha256
7043c173f072fb1d, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AP2161SG-13
**Diodes Incorporated** · AC-DC Controllers & Regulators · SOIC-8
AP2161SG-13 from Diodes Incorporated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin of the switch. |
| 2 | IN | power_in | Voltage input pin (2.7V to 5.5V operating range); all IN pins must be tied together externally. |
| 3 | IN | power_in | Voltage input pin (2.7V to 5.5V operating range); all IN pins must be tied together externally. |
| 4 | EN | input | Enable input, active low for AP2161 (AP2171 is active high); VIH min 2.0V, VIL max 0.8V. |
| 5 | FLG | output | Open-drain overcurrent and over-temperature fault flag, active low when triggered, with 7ms typical deglitch blanking time. |
| 6 | OUT | power_out | Voltage output pin with 1.5A typical current limit; all OUT pins must be tied together externally. |
| 7 | OUT | power_out | Voltage output pin with 1.5A typical current limit; all OUT pins must be tied together externally. |
| 8 | NC | unconnected | No internal connection; datasheet recommends tying it to the OUT pins. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | | | 6.5 | V | | 3 |
| Enable Voltage | VEN, VFLG | | | 6.5 | V | | 3 |
| Maximum Junction Temperature | TJ(MAX) | | | 150 | °C | | 3 |
| Storage Temperature Range | TST | -65 | | 150 | °C | | 3 |
| ESD HBM | ESD HBM | | | 4 | kV | Human Body Model | 3 |
| ESD MM (SO-8) | ESD MM | | | 300 | V | U-DFN2018-6, SO-8 packages | 3 |
| Input Voltage | VIN | 2.7 | | 5.5 | V | | 3 |
| Output Current | IOUT | 0 | | 1 | A | | 3 |
| Operating Ambient Temperature | TA | -40 | | 85 | °C | | 3 |
| High-Level Input Voltage on EN | VIH | 2 | | | V | max printed as VIN | 3 |
| Low-Level Input Voltage on EN | VIL | 0 | | 0.8 | V | | 3 |
| Input UVLO | VUVLO | 1.6 | 1.9 | 2.5 | V | RLOAD = 1kΩ | 4 |
| Input Shutdown Current | ISHDN | | 0.5 | 1 | uA | Disabled, IOUT = 0 | 4 |
| Input Quiescent Current | IQ | | 45 | 70 | µA | Enabled, IOUT = 0 | 4 |
| Input Leakage Current | ILEAK | | | 1 | µA | Disabled, OUT grounded | 4 |
| Reverse Leakage Current | IREV | | 1 | | µA | Disabled, VIN = 0V, VOUT = 5V, IREV at VIN | 4 |
| Switch on-resistance | RDS(ON) | | 95 | 115 | mΩ | VIN = 5V, IOUT = 1A, TA = +25°C, SO-8 | 4 |
| Switch on-resistance | RDS(ON) | | | 140 | mΩ | VIN = 5V, IOUT = 1A, -40°C ≤ TA ≤ +85°C | 4 |
| Switch on-resistance | RDS(ON) | | 120 | 140 | mΩ | VIN = 3.3V, IOUT = 1A, TA = +25°C | 4 |
| Switch on-resistance | RDS(ON) | | | 170 | mΩ | VIN = 3.3V, IOUT = 1A, -40°C ≤ TA ≤ +85°C | 4 |
| Short-Circuit Current Limit | ISHORT | | 1.2 | | A | Enabled into short circuit, CL = 68µF | 4 |
| Over-Load Current Limit | ILIMIT | 1.1 | 1.5 | 1.9 | A | VIN = 5V, VOUT = 4.6V, CL = 68µF, -40°C ≤ TA ≤ +85°C | 4 |
| Current limiting trigger threshold | ITrig | | 2 | | A | Output Current Slew rate (<100A/s), CL=68µF | 4 |
| EN Input leakage | ISINK | | | 1 | µA | VEN = 5V | 4 |
| Output turn-on delay time | tD(ON) | | 0.05 | | ms | CL = 1µF, RLOAD = 10Ω | 4 |
| Output turn-on rise time | tR | | 0.6 | 1.5 | ms | CL = 1µF, RLOAD = 10Ω | 4 |
| Output turn-off delay time | tD(OFF) | | 0.01 | | ms | CL = 1µF, RLOAD = 10Ω | 4 |
| Output turn-off fall time | tF | | 0.05 | 0.1 | ms | CL = 1µF, RLOAD = 10Ω | 4 |
| FLG output FET on-resistance | RFLG | | 20 | 40 | Ω | IFLG = 10mA | 4 |
| FLG blanking time | tBlank | 4 | 7 | 15 | ms | CIN = 10µF, CL = 68µF | 4 |
| Thermal Shutdown Threshold | TSHDN | | 140 | | C | Enabled, RLOAD = 1kΩ | 4 |
| Thermal Shutdown Hysteresis | THYS | | 25 | | C | | 4 |
| Thermal Resistance Junction-to-Ambient | θJA | | 110 | | °C/W | SO-8 (Note 5) | 4 |
## CAD (KiCad official)
- Symbol: `AP2161SG-13`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ap2161sg-13-etched.step` / `ap2161sg-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ap2161sg-13.step` / `ap2161sg-13.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/AP2161SG-13.pdf) (18 pp, sha256 `7043c173f072fb1d`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ap2161sg-13-datasheet.pdf)