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AP2156SG-13
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Diodes Incorporated Power Distribution Switches, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AP2156SG-13
Diodes Incorporated · Power Distribution Switches · SOIC-8
AP2156SG-13 from Diodes Incorporated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN1 | input | Switch 1 enable input, active low on AP2146 or active high on AP2156, with VIL max 0.8 V and VIH min 2 V. |
| 2 | FLG1 | output | Switch 1 over-current and over-temperature fault report, open-drain output that goes active low after a nominal 7 ms deglitch. |
| 3 | FLG2 | output | Switch 2 over-current and over-temperature fault report, open-drain output that goes active low after a nominal 7 ms deglitch. |
| 4 | EN2 | input | Switch 2 enable input, active low on AP2146 or active high on AP2156, with VIL max 0.8 V and VIH min 2 V. |
| 5 | OUT2 | power_out | Switch 2 voltage output; the absolute maximum output voltage is VIN + 0.3 V. |
| 6 | GND | power_in | Ground reference pin for the device. |
| 7 | IN | power_in | Voltage input pin, recommended 2.7 V to 5.5 V with an absolute maximum of 6.5 V. |
| 8 | OUT1 | power_out | Switch 1 voltage output; the absolute maximum output voltage is VIN + 0.3 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
AP2156SG-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ap2156sg-13-etched.step/ap2156sg-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap2156sg-13.step/ap2156sg-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (17 pp, sha256
ec63110e473b3de8, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AP2156SG-13
**Diodes Incorporated** · Power Distribution Switches · SOIC-8
AP2156SG-13 from Diodes Incorporated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN1 | input | Switch 1 enable input, active low on AP2146 or active high on AP2156, with VIL max 0.8 V and VIH min 2 V. |
| 2 | FLG1 | output | Switch 1 over-current and over-temperature fault report, open-drain output that goes active low after a nominal 7 ms deglitch. |
| 3 | FLG2 | output | Switch 2 over-current and over-temperature fault report, open-drain output that goes active low after a nominal 7 ms deglitch. |
| 4 | EN2 | input | Switch 2 enable input, active low on AP2146 or active high on AP2156, with VIL max 0.8 V and VIH min 2 V. |
| 5 | OUT2 | power_out | Switch 2 voltage output; the absolute maximum output voltage is VIN + 0.3 V. |
| 6 | GND | power_in | Ground reference pin for the device. |
| 7 | IN | power_in | Voltage input pin, recommended 2.7 V to 5.5 V with an absolute maximum of 6.5 V. |
| 8 | OUT1 | power_out | Switch 1 voltage output; the absolute maximum output voltage is VIN + 0.3 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `AP2156SG-13`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ap2156sg-13-etched.step` / `ap2156sg-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ap2156sg-13.step` / `ap2156sg-13.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588879899507494912) (17 pp, sha256 `ec63110e473b3de8`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ap2156sg-13-datasheet.pdf)