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docs ap2151mpg-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers ap2151mpg-13: viewers · Ray 28d ago
ap2151mpg-13-etched.fit.json ap2151mpg-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ap2151mpg-13-etched.glb ap2151mpg-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ap2151mpg-13-etched.step ap2151mpg-13: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ap2151mpg-13.glb Publish 0.1.0 · Ray 28d ago
ap2151mpg-13.kicad_mod Publish 0.1.0 · Ray 28d ago
ap2151mpg-13.kicad_sym Publish 0.1.0 · Ray 28d ago
ap2151mpg-13.lbr Publish 0.1.0 · Ray 28d ago
ap2151mpg-13.step Publish 0.1.0 · Ray 28d ago
package.json Publish 0.1.0 · Ray 28d ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 12d ago
README.md ap2151mpg-13: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 18d ago

AP2151MPG-13

Diodes Incorporated · AC-DC Controllers and Regulators · MSOP-8-EP

AP2151MPG-13 from Diodes Incorporated, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Device ground reference. Connect to the system ground plane.
2 IN power_in Voltage input pin (2.7V to 5.5V). All IN pins must be tied together externally. Provides the switched supply that feeds the internal high-side power MOSFET.
3 IN power_in Voltage input pin (2.7V to 5.5V). All IN pins must be tied together externally. Provides the switched supply that feeds the internal high-side power MOSFET.
4 EN input Enable input. Active High for the AP2151 variant. VIL max = 0.8V, VIH min = 2V. Drives the internal driver/UVLO logic to turn the switch on or off.
5 FLG output Over-Current and Over-Temperature fault report. Open-drain output that is active-low when a fault is triggered; typically pulled up to a logic supply through an external resistor (e.g. 10 kΩ). 7 ms typical blanking time filters transient faults. RFLG on-resistance ≈ 20 Ω.
6 OUT power_out Switched voltage output. All OUT pins must be tied together externally. Connect an output capacitor to ground (typical bulk 120 µF plus 0.1 µF ceramic).
7 OUT power_out Switched voltage output. All OUT pins must be tied together externally. Connect an output capacitor to ground (typical bulk 120 µF plus 0.1 µF ceramic).
8 NC unconnected No internal connection. Datasheet recommends tying to OUT pins.
9 EP passive Exposed thermal pad. Must be externally connected to the GND plane and thermal mass for enhanced thermal impedance. It must NOT be used as the electrical ground conduction path.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package MSOP-8-EP
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • AP2151MPG-13
  • AP2151MPG-13S
  • AP2151MPG-13W
  • AP2151MPG-13FDC

CAD (KiCad official)

  • Symbol: AP2151MPG-13
  • Footprint: Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm
  • 3D model: MSOP-8-EP (KiCad packages3D, STEP)
  • 3D model files: ap2151mpg-13-etched.step / ap2151mpg-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap2151mpg-13.step / ap2151mpg-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (18 pp, sha256 a4188ed1646758fd, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF