# AP2132MP-2.5TRG1

**Diodes Incorporated** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8-EP

AP2132MP-2.5TRG1 from Diodes Incorporated, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PG | output | Power good output asserts high once VOUT reaches 92% of its rating voltage. |
| 2 | EN | input | Enable input; enable high requires at least 1.5 V and enable low is at most 0.4 V. |
| 3 | VIN | power_in | Input voltage; recommended range 1.4 V to 5.5 V. |
| 4 | VCTRL | power_in | Input voltage for controlling circuit; recommended range 4.5 V to 5.5 V. |
| 5 | NC | unconnected | Not connected. |
| 6 | VOUT | power_out | Regulated output voltage. |
| 7 | ADJ | input | Internal mode: connect to ground to use internal resistors; external mode: connect to feedback resistors with VOUT = 0.6 (R1+R2)/R2, do not program below 0.6 V. |
| 8 | GND | power_in | Ground; required even when the thermal pad is grounded or left open. |
| 9 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs |  |, ESD (Human Body Model) 2000 V Note 4: Stresses greater than those listed under “Absolute Maximum Ratings” can cause permanent damage to the device. These are stress ratings only, and | 4 |

## CAD (KiCad official)

- Symbol: `AP2132MP-2.5TRG1`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files: `ap2132mp-2-5trg1-etched.step` / `ap2132mp-2-5trg1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ap2132mp-2-5trg1.step` / `ap2132mp-2-5trg1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8560091445265514496) (12 pp, sha256 `b6b5802a960cd779`, retrieved 2026-11-06, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ap2132mp-2-5trg1-datasheet.pdf)